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    GHz Range CMOS LNA

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    This thesis work presents 7GHz CMOS Common Gate LNA, Layout design and a scaled down version of the same topology with BJT, operating frequency of 5MHz. Schematic was designed in OrCAD Capture CIS, gain and linearity results were taken. PCB LNA was modified to operate at the target frequency of 5MHz. Its linearity, gain measurements and practical results were taken by using oscilloscope and spectrum analyzers. These measurements results were then compared with the results taken previously in OrCAD Capture CIS design environment. Both the measurement results were taken by giving different input powers. The goal was to check the behavior of LNA and to see the effects of different components on its gain and linearity. Also the task was to find out for what range of input power it remains linear and stable. Another part of this thesis work is GHz range Complementary Metal Oxide Semiconductor (CMOS) LNA and then followed by the design layout for the circuit. Schematic for GHz range LNA was designed using Cadence Virtuoso 45nm technology, and operational frequency target was 7GHz. The design followed mainly the same methodology as it was for the MHz range LNA, but here in CMOS technology the higher operational frequency was selected. Common gate stage was designed to operate at targeted frequency, and since common gate has low input and high output impedance, buffer stage is needed for output matching. White’s Cascode buffer stage was introduced for output impedance matching. Different parameters results are needed to be achieved for LNA design before stepping forward into Layout design. Such as Scattering parameters, Noise Figure, Stability, transient analysis, Linearity, 1dB compression point and IP3 measurement. Next part of thesis work consists of Layout design of 7GHz CMOS LNA. A Layout was carefully designed by taking care of allocation of metal layers to avoid extra sheet resistances, and paths were capable of withstanding enough current density. Its parasitic extracted results were compared with the results obtained from the schematic design. Clear difference was noticed during comparison between important parameters, such as gain and operational frequency
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