11 research outputs found

    Rapid single-flux-quantum dual-rail logic for asynchronous circuits

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    New BSFQ circuit designs with wide margins

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    Recently we have proposed novel Boolean Single-Flux-quantum (BSFQ) circuits, which Just like CMOS circuits support Boolean primitives directly, and do not require local synchronization for each operation cell. However, previous BSFQ AND, OR, and XOR cells suffered from problems with narrow margin, where their critical margins hardly exceeded +/- 10% due to low flux gain. Furthermore, while being suitable for combinational circuits, previous BSFQ NOT cells had initialization problems in sequential circuits. In this paper, new versions of these circuits with simulated margins beyond +/- 30% are proposed. Moreover, a Muller C-element, an error canceller, a destructive read-out (DRO), and a demultiplexer are also newly created. The operation time, parameter margins, and circuit size of these BSFQ cells are comparable to those of the conventional RSFQ cells

    Design and Test of Asynchronous Systems Using the Link and Joint Model

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    Asynchronous circuits offer numerous advantages, including low energy consumption and good composability and scalability. However, they remain meagerly adopted in the mainstream semiconductor industry. One reason is the limited number of design tools available to help designers navigate design complexity, particularly the myriad of asynchronous implementation styles. This dissertation focuses on managing the myriad of asynchronous implementation styles by utilizing a circuit-neutral model, called Links and Joints, and embedding this Link-Joint approach into a design flow. Although years of past work have already laid the groundwork, the work in this dissertation identifies and addresses key missing pieces. First, the dissertation presents a design and test methodology centered around Links and Joints that exploits the similarities between multiple circuit implementation styles. This methodology offers interface uniformity and generality for various asynchronous circuit families and protocols, as well as flexibility in implementation choices and circuit initialization. Second, this dissertation shows the Link-Joint methodology embedded in a design flow. The resulting flow, called ỌnĂ  (/or-NUHR/, Yoruba for way ), includes compilation and refinement steps for transforming high-level parallel programs with message passing via circuit-neutral Link-Joint networks into asynchronous circuits, postponing choices in protocol and circuit family as late as possible. ỌnĂ  also carries along test and debug, using a uniform test approach that fosters test reuse from one abstraction level to another. ỌnĂ  makes it easy to insert asynchrony appropriate for each design part. The dissertation demonstrates this ease by providing methodology and design flow support for various protocols such as 2- and 4-phase protocols, level- and pulse- and transition signaling logic, bundled data, and circuit families such as Click, GasP, Set-Reset, Mousetrap, Micropipelines, and the Single Flux Quantum (*SFQ) superconductor family. The dissertation also demonstrates that mixing and matching different circuit implementation styles in ỌnĂ  is flexible and straightforward

    Defect-based testing of LTS digital circuits

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    A Defect-Based Test (DBT) methodology for Superconductor Electronics (SCE) is presented in this thesis, so that commercial production and efficient testing of systems can be implemented in this technology in the future. In the first chapter, the features and prospects for SCE have been presented. The motivation for this research and the outline of the thesis were also described in Chapter 1. It has been shown that high-end applications such as Software-Defined Radio (SDR) and petaflop computers which are extremely difficult to implement in top-of-the-art semiconductor technologies can be realised using SCE. But, a systematic structural test methodology had yet to be developed for SCE and has been addressed in this thesis. A detailed introduction to Rapid Single-Flux Quantum (RSFQ) circuits was presented in Chapter 2. A Josephson Junction (JJ) was described with associated theory behind its operation. The JJ model used in the simulator used in this research work was also presented. RSFQ logic with logic protocols as well as the design and implementation of an example D-type flip-flop (DFF) was also introduced. Finally, advantages and disadvantages of RSFQ circuits have been discussed with focus on the latest developments in the field. Various techniques for testing RSFQ circuits were discussed in Chapter 3. A Process Defect Monitor (PDM) approach was presented for fabrication process analysis. The presented defect-monitor structures were used to gather measurement data, to find the probability of the occurrence of defects in the process which forms the first step for Inductive Fault Analysis (IFA). Results from measurements on these structures were used to create a database for defects. This information can be used as input for performing IFA. "Defect-sprinkling" over a fault-free circuit can be carried out according to the measured defect densities over various layers. After layout extraction and extensive fault simulation, the resulting information will indicate realistic faults. In addition, possible Design-for-Testability (DfT) schemes for monitoring Single-Flux Quantum (SFQ) pulses within an RSFQ circuit has also been discussed in Chapter 3. The requirement for a DfT scheme is inevitable for RSFQ circuits because of their very high frequency of operation and very low operating temperature. It was demonstrated how SFQ pulses can be monitored at an internal node of an SCE circuit, introducing observability using Test-Point Insertion (TPI). Various techniques were discussed for the introduction of DfT and to avoid the delay introduced by the DfT structure if it is required. The available features in the proposed design for customising the detector make it attractive for a detailed DBT of RSFQ circuits. The control of internal nodes has also been illustrated using TPI. The test structures that were designed and implemented to determine the occurrence of defects in the processes can also be used to locate the position for the insertion of the above mentioned DfT structures

    Physikalische und technologische Limitierungen von SNS-Josephson-Kontakten fĂŒr hochintegrierbare Tieftemperatur-Supraleiterschaltungen

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    Die vorliegend Arbeit untersucht die physikalischen und technologischen Limitierungen von neuartigen SNS-Josephson- Kontakten in Rampentechnologie. Auf der Basis von interinsisch geshunteten Nb/HfTi/Nb- und Nb/HfTi/Nb/HfTi/Nb-Kontakten konnte eine Fabrikationstechnologie entwickelt werden, die es ermöglicht, reproduzierbar sub-”m Kontakte bis hinab zu KontaktflĂ€chen von A = 0,03 ”m2 herzustellen. Es werden die physikalischen Eigenschaften der Kontakte untersucht: Temperatur- und MagnetfeldabhĂ€ngigkeit der kritischen StromstĂ€rke IC, Einfluß von Mikrowelleneinstrahlung: Shapiro-Stufen, differentieller Widerstand. Zur Realisierung supraleitender digitaler Elektronikschaltungen (SDE) wird die StromtragfĂ€higkeit von sub-”m Nb-Leiterbahnen gemessen und der Fringe-Faktor bestimmt. Es wird gezeigt, daß sich die neuartigen Josephson-Kontakte zur Herstellung von Serienschaltungen eignen, wie sie in Josephson-Spannungsnormalen zum Einsatz kommen. Weiterhin wird die Einsetzbarkeit der neuartigen Kontakte in supraleitenden digitalen Logikschaltungen in Rapid-Single-Flux-Quantum- (RSFQ) Implementierung verifiziert

    Towards a fully integrated quantum optic circuit

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    Understanding Quantum Technologies 2022

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    Understanding Quantum Technologies 2022 is a creative-commons ebook that provides a unique 360 degrees overview of quantum technologies from science and technology to geopolitical and societal issues. It covers quantum physics history, quantum physics 101, gate-based quantum computing, quantum computing engineering (including quantum error corrections and quantum computing energetics), quantum computing hardware (all qubit types, including quantum annealing and quantum simulation paradigms, history, science, research, implementation and vendors), quantum enabling technologies (cryogenics, control electronics, photonics, components fabs, raw materials), quantum computing algorithms, software development tools and use cases, unconventional computing (potential alternatives to quantum and classical computing), quantum telecommunications and cryptography, quantum sensing, quantum technologies around the world, quantum technologies societal impact and even quantum fake sciences. The main audience are computer science engineers, developers and IT specialists as well as quantum scientists and students who want to acquire a global view of how quantum technologies work, and particularly quantum computing. This version is an extensive update to the 2021 edition published in October 2021.Comment: 1132 pages, 920 figures, Letter forma
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