Error-power tradeoffs in QCA design

In this work we present an error-power tradeoff study in a Quantum-dot Cellular Automata (QCA) circuit design. Device parameter variation to optimize performance is a very crucial step in the development of a technology. In this work we vary the maximum kink energy of a QCA circuit to perform an error-power tradeoff study in QCA design. We make use of graphical probabilistic models to estimate polarization errors and non-adiabatic energy dissipated in a clocked QCA circuit and demonstrate the tradeoff studies on the basic QCA circuits such as majority gate and inverter. We also show how this study can be used by comparing two single bit adder designs. The study will be of great use to designers and fabrication scientists to choose the most optimum size and spacing of QCA cells to fabricate QCA logic designs

Mathematical Estimation of Logical Masking Capability of Majority/Minority Gates Used in Nanoelectronic Circuits

In nanoelectronic circuit synthesis, the majority gate and the inverter form the basic combinational logic primitives. This paper deduces the mathematical formulae to estimate the logical masking capability of majority gates, which are used extensively in nanoelectronic digital circuit synthesis. The mathematical formulae derived to evaluate the logical masking capability of majority gates holds well for minority gates, and a comparison with the logical masking capability of conventional gates such as NOT, AND/NAND, OR/NOR, and XOR/XNOR is provided. It is inferred from this research work that the logical masking capability of majority/minority gates is similar to that of XOR/XNOR gates, and with an increase of fan-in the logical masking capability of majority/minority gates also increases

ToPoliNano: Nano-magnet Logic Circuits Design and Simulation

Among the emerging technologies Field-Coupled devices like Quantum dot Cellular Automata are particularly interesting. Of all the practical implementations of this principle NanoMagnet Logic shows many important features, such as a very low power consumption and the feasibility with up-to- date technology. However, its working principle, based on the interaction among neighbor cells, is quite different with respect to CMOS devices behavior. Dedicated design and simulation tools for this technology are necessary to further study this technology, but at the moment there are no such tools available in the scientific scenario. We present here ToPoliNano, a software developed as a design and simulation tool for NanoMagnet Logic, that can be easily adapted to many others emerging technologies, particularly to any kind of Field-Coupled devices. ToPoliNano allows to design circuits following a top-down approach similar to the one used in CMOS and to simulate them using a switch model specifically targeted for high complexity circuits. This tool greatly enhances the ability to analyze, explore and improve the design of Field- Coupled circuit

Hierarchical probabilistic macromodeling for QCA circuits

With the goal of building an hierarchical design methodology for quantum-dot cellular automata (QCA) circuits, we put forward a novel, theoretically sound, method for abstracting the behavior of circuit components in QCA circuit, such as majority logic, lines, wire-taps, cross-overs, inverters, and corners, using macromodels. Recognizing that the basic operation of QCA is probabilistic in nature, we propose probabilistic macromodels for standard QCA circuit elements based on conditional probability characterization, defined over the output states given the input states. Any circuit model is constructed by chaining together the individual logic element macromodels, forming a Bayesian network, defining a joint probability distribution over the whole circuit. We demonstrate three uses for these macromodel-based circuits. First, the probabilistic macromodels allow us to model the logical function of QCA circuits at an abstract level - the "circuit" level - above the current practice of layout level in a time and space efficient manner. We show that the circuit level model is orders of magnitude faster and requires less space than layout level models, making the design and testing of large QCA circuits efficient and relegating the costly full quantum-mechanical simulation of the temporal dynamics to a later stage in the design process. Second, the probabilistic macromodels abstract crucial device level characteristics such as polarization and low-energy error state configurations at the circuit level. We demonstrate how this macromodel-based circuit level representation can be used to infer the ground state probabilities, i.e., cell polarizations, a crucial QCA parameter. This allows us to study the thermal behavior of QCA circuits at a higher level of abstraction. Third, we demonstrate the use of these macromodels for error analysis. We show that low-energy state configurations of the macromodel circuit match those of the layout level, thus allowing us to isolate weak p- oints in circuits design at the circuit level itsel