26,230 research outputs found

    Effects of quasiparticle tunneling in a circuit-QED realization of a strongly driven two-level system

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    We experimentally and theoretically study the frequency shift of a driven cavity coupled to a superconducting charge qubit. In addition to previous studies, we here also consider drive strengths large enough to energetically allow for quasiparticle creation. Quasiparticle tunneling leads to the inclusion of more than two charge states in the dynamics. To explain the observed effects, we develop a master equation for the microwave dressed charge states, including quasiparticle tunneling. A bimodal behavior of the frequency shift as a function of gate voltage can be used for sensitive charge detection. However, at weak drives the charge sensitivity is significantly reduced by non-equilibrium quasiparticles, which induce transitions to a non-sensitive state. Unexpectedly, at high enough drives, quasiparticle tunneling enables a very fast relaxation channel to the sensitive state. In this regime, the charge sensitivity is thus robust against externally injected quasiparticles and the desired dynamics prevail over a broad range of temperatures. We find very good agreement between theory and experiment over a wide range of drive strengths and temperatures.Comment: 25 pages, 7 figure

    Quantum Acoustics with Surface Acoustic Waves

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    It has recently been demonstrated that surface acoustic waves (SAWs) can interact with superconducting qubits at the quantum level. SAW resonators in the GHz frequency range have also been found to have low loss at temperatures compatible with superconducting quantum circuits. These advances open up new possibilities to use the phonon degree of freedom to carry quantum information. In this paper, we give a description of the basic SAW components needed to develop quantum circuits, where propagating or localized SAW-phonons are used both to study basic physics and to manipulate quantum information. Using phonons instead of photons offers new possibilities which make these quantum acoustic circuits very interesting. We discuss general considerations for SAW experiments at the quantum level and describe experiments both with SAW resonators and with interaction between SAWs and a qubit. We also discuss several potential future developments.Comment: 14 pages, 12 figure

    A New Strategy for Deep Wide-Field High Resolution Optical Imaging

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    We propose a new strategy for obtaining enhanced resolution (FWHM = 0.12 arcsec) deep optical images over a wide field of view. As is well known, this type of image quality can be obtained in principle simply by fast guiding on a small (D = 1.5m) telescope at a good site, but only for target objects which lie within a limited angular distance of a suitably bright guide star. For high altitude turbulence this 'isokinetic angle' is approximately 1 arcminute. With a 1 degree field say one would need to track and correct the motions of thousands of isokinetic patches, yet there are typically too few sufficiently bright guide stars to provide the necessary guiding information. Our proposed solution to these problems has two novel features. The first is to use orthogonal transfer charge-coupled device (OTCCD) technology to effectively implement a wide field 'rubber focal plane' detector composed of an array of cells which can be guided independently. The second is to combine measured motions of a set of guide stars made with an array of telescopes to provide the extra information needed to fully determine the deflection field. We discuss the performance, feasibility and design constraints on a system which would provide the collecting area equivalent to a single 9m telescope, a 1 degree square field and 0.12 arcsec FWHM image quality.Comment: 46 pages, 22 figures, submitted to PASP, a version with higher resolution images and other supplementary material can be found at http://www.ifa.hawaii.edu/~kaiser/wfhr

    Product assurance technology for custom LSI/VLSI electronics

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    The technology for obtaining custom integrated circuits from CMOS-bulk silicon foundries using a universal set of layout rules is presented. The technical efforts were guided by the requirement to develop a 3 micron CMOS test chip for the Combined Release and Radiation Effects Satellite (CRRES). This chip contains both analog and digital circuits. The development employed all the elements required to obtain custom circuits from silicon foundries, including circuit design, foundry interfacing, circuit test, and circuit qualification

    Encoded Universality for Generalized Anisotropic Exchange Hamiltonians

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    We derive an encoded universality representation for a generalized anisotropic exchange Hamiltonian that contains cross-product terms in addition to the usual two-particle exchange terms. The recently developed algebraic approach is used to show that the minimal universality-generating encodings of one logical qubit are based on three physical qubits. We show how to generate both single- and two-qubit operations on the logical qubits, using suitably timed conjugating operations derived from analysis of the commutator algebra. The timing of the operations is seen to be crucial in allowing simplification of the gate sequences for the generalized Hamiltonian to forms similar to that derived previously for the symmetric (XY) anisotropic exchange Hamiltonian. The total number of operations needed for a controlled-Z gate up to local transformations is five. A scalable architecture is proposed.Comment: 11 pages, 4 figure

    Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

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    Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis
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