2 research outputs found

    Mathematical Model for Approximation the Efficiency of Parallel Computing on Single Board Cluster with Least-squares Approximation

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    This research aims to study the relationship between parallel processing efficiency and several nodes on a single board cluster using a mathematical model, approximating least squares. This research tested on the Raspberry Pi single-board in the form of a high-performance computing system. It divided the tasks that need to be processed in each particular part and sent it to each unit to process simultaneously via the MPI (Messaging Passing Interface). This process is the standard division of work with communication between processors in the form of messages on the cluster system. It consists of eight nodes of Raspberry Pi. It measures the instruction set's ability to perform decimal operations per second or Floating-point Operation Per Second (FLOPS) with High-Performance Linpack Benchmarks (HPL). As a result, the efficiency of the ability to process instruction set in decimal per second increases the performance continuously when increasing the number of the node on the cluster. Which corresponds to the mathematical model obtained f(x) = 1.0684x^(0.8256).It shows a relationship between parallel processing performance values and the number of nodes on the cluster and can be estimated with the mathematical model above

    Experimental evaluation of a CPU Live Migration on ARM based Bare metal Instances

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    The advent of 5G and the adoption of digitalization in all areas of industry has resulted in the exponential growth of the Internet of Things (IoTs) devices, increasing the flow of data that travels back and forth to a centralized Cloud data centre for storage, processing, and analysis. This in turn puts pressure on the intermediate edge and core network infrastructure as traditional Cloud Computing is not ready to support this massive amount and diversity of devices and data. This need for faster processing, low latency and higher network consistency makes a case for Edge Computing solutions. However, applying Edge Computing as a solution to overcome the network performance limitations that exist on an “IoT to Cloud” architecture while continuing to use Virtualization technology for system utilization is a bit of an oxymoron. Virtualization increases performance overheads, while sharing network resources among users and applications creates further bandwidth limitations and latency since communications are still served through the same physical network interfaces. The demand for network and system consistency, finer security and privacy has led to the deployment of Bare metal instances. Bare metal instances are nothing more than traditional servers that lack the virtualization layer offering native performance to the user. Furthermore, the rise of the ARM processors and the introduction of cheap low power architectures targeted to the Edge introduce a compelling new candidate platform especially on Bare metal instances. Live migration is a valuable tool for increasing applications and users’ mobility, service availability offering workload balancing and fault tolerance. However, live migration is tied to the existence of a virtualization layer therefore implementing a live migration process on Bare metal instances is very challenging. To the best of our knowledge, there is no existing proposal for a Bare metal live migration scheme on ARM based systems. Therefore, this thesis presents a novel design, implementation, and evaluation of an ARM based live migration scheme for Bare metal instances suitable for modern EdgeComputing Micro Data Centres. Our experimental evaluation confirms the effectiveness of our novel design as well as highlighting the importance on identifying the number of registers that describe and are critical for the reconstruction of the CPU state at the destination
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