A Hardware-Efficient Synchronization in L-DACS1 for Aeronautical Communications

L-band digital aeronautical communication system type-1 (L-DACS1) is an emerging standard that aims at enhancing air traffic management by transitioning the traditional analog aeronautical communication systems to the superior and highly efficient digital domain. L-DACS1 employs modern and efficient orthogonal frequency-division multiplexing (OFDM) modulation technique to achieve more efficient and higher data rate in comparison to the existing aeronautical communication systems. However, the performance of OFDM systems is very sensitive to synchronization errors such as symbol timing offset (STO) and carrier frequency offset (CFO). STO and CFO estimations are extremely important for maintaining orthogonality among the subcarriers for the retrieval of information. This paper proposes a novel efficient hardware synchronizer for L-DACS1 systems that offers robust performance at low power and low hardware resource usage. Monte Carlo simulations show that the proposed synchronization algorithm provides accurate STO estimation as well as fractional CFO estimation. Implementation of the proposed synchronizer on a widely used field-programmable gate array (FPGA) (Xilinx xc7z020clg484-1) results in a very low hardware usage which consumed 6.5%, 3.7%, and 6.4% of the total number of lookup tables, flip-flops, and digital signal processing blocks, respectively. The dynamic power of the proposed synchronizer is below 1 mW.Comment: arXiv admin note: substantial text overlap with arXiv:1801.0590

Hybrid Beamforming via the Kronecker Decomposition for the Millimeter-Wave Massive MIMO Systems

Despite its promising performance gain, the realization of mmWave massive MIMO still faces several practical challenges. In particular, implementing massive MIMO in the digital domain requires hundreds of RF chains matching the number of antennas. Furthermore, designing these components to operate at the mmWave frequencies is challenging and costly. These motivated the recent development of hybrid-beamforming where MIMO processing is divided for separate implementation in the analog and digital domains, called the analog and digital beamforming, respectively. Analog beamforming using a phase array introduces uni-modulus constraints on the beamforming coefficients, rendering the conventional MIMO techniques unsuitable and call for new designs. In this paper, we present a systematic design framework for hybrid beamforming for multi-cell multiuser massive MIMO systems over mmWave channels characterized by sparse propagation paths. The framework relies on the decomposition of analog beamforming vectors and path observation vectors into Kronecker products of factors being uni-modulus vectors. Exploiting properties of Kronecker mixed products, different factors of the analog beamformer are designed for either nulling interference paths or coherently combining data paths. Furthermore, a channel estimation scheme is designed for enabling the proposed hybrid beamforming. The scheme estimates the AoA of data and interference paths by analog beam scanning and data-path gains by analog beam steering. The performance of the channel estimation scheme is analyzed. In particular, the AoA spectrum resulting from beam scanning, which displays the magnitude distribution of paths over the AoA range, is derived in closed-form. It is shown that the inter-cell interference level diminishes inversely with the array size, the square root of pilot sequence length and the spatial separation between paths.Comment: Submitted to IEEE JSAC Special Issue on Millimeter Wave Communications for Future Mobile Networks, minor revisio

Three Realizations and Comparison of Hardware for Piezoresistive Tactile Sensors

Tactile sensors are basically arrays of force sensors that are intended to emulate the skin in applications such as assistive robotics. Local electronics are usually implemented to reduce errors and interference caused by long wires. Realizations based on standard microcontrollers, Programmable Systems on Chip (PSoCs) and Field Programmable Gate Arrays (FPGAs) have been proposed by the authors for the case of piezoresistive tactile sensors. The solution employing FPGAs is especially relevant since their performance is closer to that of Application Specific Integrated Circuits (ASICs) than that of the other devices. This paper presents an implementation of such an idea for a specific sensor. For the purpose of comparison, the circuitry based on the other devices is also made for the same sensor. This paper discusses the implementation issues, provides details regarding the design of the hardware based on the three devices and compares them.This work has been partially funded by the Spanish Government under contracts TEC2006-12376 and TEC2009-14446