151,023 research outputs found
A Survey of Techniques For Improving Energy Efficiency in Embedded Computing Systems
Recent technological advances have greatly improved the performance and
features of embedded systems. With the number of just mobile devices now
reaching nearly equal to the population of earth, embedded systems have truly
become ubiquitous. These trends, however, have also made the task of managing
their power consumption extremely challenging. In recent years, several
techniques have been proposed to address this issue. In this paper, we survey
the techniques for managing power consumption of embedded systems. We discuss
the need of power management and provide a classification of the techniques on
several important parameters to highlight their similarities and differences.
This paper is intended to help the researchers and application-developers in
gaining insights into the working of power management techniques and designing
even more efficient high-performance embedded systems of tomorrow
Coding gain in paraunitary analysis/synthesis systems
A formal proof that bit allocation results hold for the entire class of paraunitary subband coders is presented. The problem of finding an optimal paraunitary subband coder, so as to maximize the coding gain of the system, is discussed. The bit allocation problem is analyzed for the case of the paraunitary tree-structured filter banks, such as those used for generating orthonormal wavelets. The even more general case of nonuniform filter banks is also considered. In all cases it is shown that under optimal bit allocation, the variances of the errors introduced by each of the quantizers have to be equal. Expressions for coding gains for these systems are derived
FpSynt: a fixed-point datapath synthesis tool for embedded systems
Digital mobile systems must function with low power, small size and weight,
and low cost. High-performance desktop microprocessors, with built-in floating
point hardware, are not suitable in these cases. For embedded systems, it can
be advantageous to implement these calculations with fixed point arithmetic
instead. We present an automated fixed-point data path synthesis tool FpSynt
for designing embedded applications in fixed-point domain with sufficient
accuracy for most applications. FpSynt is available under the GNU General
Public License from the following GitHub repository:
http://github.com/izhbannikov/FPSYN
Sound and Automated Synthesis of Digital Stabilizing Controllers for Continuous Plants
Modern control is implemented with digital microcontrollers, embedded within
a dynamical plant that represents physical components. We present a new
algorithm based on counter-example guided inductive synthesis that automates
the design of digital controllers that are correct by construction. The
synthesis result is sound with respect to the complete range of approximations,
including time discretization, quantization effects, and finite-precision
arithmetic and its rounding errors. We have implemented our new algorithm in a
tool called DSSynth, and are able to automatically generate stable controllers
for a set of intricate plant models taken from the literature within minutes.Comment: 10 page
Low Power Processor Architectures and Contemporary Techniques for Power Optimization – A Review
The technological evolution has increased the number of transistors for a given die area significantly and increased the switching speed from few MHz to GHz range. Such inversely proportional decline in size and boost in performance consequently demands shrinking of supply voltage and effective power dissipation in chips with millions of transistors. This has triggered substantial amount of research in power reduction techniques into almost every aspect of the chip and particularly the processor cores contained in the chip. This paper presents an overview of techniques for achieving the power efficiency mainly at the processor core level but also visits related domains such as buses and memories. There are various processor parameters and features such as supply voltage, clock frequency, cache and pipelining which can be optimized to reduce the power consumption of the processor. This paper discusses various ways in which these parameters can be optimized. Also, emerging power efficient processor architectures are overviewed and research activities are discussed which should help reader identify how these factors in a processor contribute to power consumption. Some of these concepts have been already established whereas others are still active research areas. © 2009 ACADEMY PUBLISHER
- …