1,015 research outputs found
Memcapacitive Devices in Logic and Crossbar Applications
Over the last decade, memristive devices have been widely adopted in
computing for various conventional and unconventional applications. While the
integration density, memory property, and nonlinear characteristics have many
benefits, reducing the energy consumption is limited by the resistive nature of
the devices. Memcapacitors would address that limitation while still having all
the benefits of memristors. Recent work has shown that with adjusted parameters
during the fabrication process, a metal-oxide device can indeed exhibit a
memcapacitive behavior. We introduce novel memcapacitive logic gates and
memcapacitive crossbar classifiers as a proof of concept that such applications
can outperform memristor-based architectures. The results illustrate that,
compared to memristive logic gates, our memcapacitive gates consume about 7x
less power. The memcapacitive crossbar classifier achieves similar
classification performance but reduces the power consumption by a factor of
about 1,500x for the MNIST dataset and a factor of about 1,000x for the
CIFAR-10 dataset compared to a memristive crossbar. Our simulation results
demonstrate that memcapacitive devices have great potential for both Boolean
logic and analog low-power applications
Neuro-memristive Circuits for Edge Computing: A review
The volume, veracity, variability, and velocity of data produced from the
ever-increasing network of sensors connected to Internet pose challenges for
power management, scalability, and sustainability of cloud computing
infrastructure. Increasing the data processing capability of edge computing
devices at lower power requirements can reduce several overheads for cloud
computing solutions. This paper provides the review of neuromorphic
CMOS-memristive architectures that can be integrated into edge computing
devices. We discuss why the neuromorphic architectures are useful for edge
devices and show the advantages, drawbacks and open problems in the field of
neuro-memristive circuits for edge computing
Hierarchical Composition of Memristive Networks for Real-Time Computing
Advances in materials science have led to physical instantiations of
self-assembled networks of memristive devices and demonstrations of their
computational capability through reservoir computing. Reservoir computing is an
approach that takes advantage of collective system dynamics for real-time
computing. A dynamical system, called a reservoir, is excited with a
time-varying signal and observations of its states are used to reconstruct a
desired output signal. However, such a monolithic assembly limits the
computational power due to signal interdependency and the resulting correlated
readouts. Here, we introduce an approach that hierarchically composes a set of
interconnected memristive networks into a larger reservoir. We use signal
amplification and restoration to reduce reservoir state correlation, which
improves the feature extraction from the input signals. Using the same number
of output signals, such a hierarchical composition of heterogeneous small
networks outperforms monolithic memristive networks by at least 20% on waveform
generation tasks. On the NARMA-10 task, we reduce the error by up to a factor
of 2 compared to homogeneous reservoirs with sigmoidal neurons, whereas single
memristive networks are unable to produce the correct result. Hierarchical
composition is key for solving more complex tasks with such novel nano-scale
hardware
A CMOS Spiking Neuron for Dense Memristor-Synapse Connectivity for Brain-Inspired Computing
Neuromorphic systems that densely integrate CMOS spiking neurons and
nano-scale memristor synapses open a new avenue of brain-inspired computing.
Existing silicon neurons have molded neural biophysical dynamics but are
incompatible with memristor synapses, or used extra training circuitry thus
eliminating much of the density advantages gained by using memristors, or were
energy inefficient. Here we describe a novel CMOS spiking leaky
integrate-and-fire neuron circuit. Building on a reconfigurable architecture
with a single opamp, the described neuron accommodates a large number of
memristor synapses, and enables online spike timing dependent plasticity (STDP)
learning with optimized power consumption. Simulation results of an 180nm CMOS
design showed 97% power efficiency metric when realizing STDP learning in
10,000 memristor synapses with a nominal 1M{\Omega} memristance, and only
13{\mu}A current consumption when integrating input spikes. Therefore, the
described CMOS neuron contributes a generalized building block for large-scale
brain-inspired neuromorphic systems.Comment: This is a preprint of an article accepted for publication in
International Joint Conference on Neural Networks (IJCNN) 201
Neuromorphic, Digital and Quantum Computation with Memory Circuit Elements
Memory effects are ubiquitous in nature and the class of memory circuit
elements - which includes memristors, memcapacitors and meminductors - shows
great potential to understand and simulate the associated fundamental physical
processes. Here, we show that such elements can also be used in electronic
schemes mimicking biologically-inspired computer architectures, performing
digital logic and arithmetic operations, and can expand the capabilities of
certain quantum computation schemes. In particular, we will discuss few
examples where the concept of memory elements is relevant to the realization of
associative memory in neuronal circuits, spike-timing-dependent plasticity of
synapses, digital and field-programmable quantum computing
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