Tradeoffs in Design of Low-Power Gated-Oscillator CDR Circuits

This article describes some techniques for implementing low- power clock and data recovery (CDR) circuits based on gated- oscillator (GO) topology for short distance applications. Here, the main tradeoffs in design of a high performance and power-efficient GO CDR are studied and based on that a top-down design methodology is introduced such that the jitter tolerance (JTOL) and frequency tolerance (FTOL) requirements of the system are simultaneously satisfied. A test chip has been implemented in standard digital 0.18 μm CMOS while the proposed CDR circuit consumes only 10.5 mW and occupies 0.045 mm2 silicon area in 2.5 Gbps data bit rate. Measurement results show a good agreement to analyses proofs the capabilities of the proposed approach for implementing low-power GO CDRs

Millimeter-wave Communication and Radar Sensing — Opportunities, Challenges, and Solutions

With the development of communication and radar sensing technology, people are able to seek for a more convenient life and better experiences. The fifth generation (5G) mobile network provides high speed communication and internet services with a data rate up to several gigabit per second (Gbps). In addition, 5G offers great opportunities of emerging applications, for example, manufacture automation with the help of precise wireless sensing. For future communication and sensing systems, increasing capacity and accuracy is desired, which can be realized at millimeter-wave spectrum from 30 GHz to 300 GHz with several tens of GHz available bandwidth. Wavelength reduces at higher frequency, this implies more compact transceivers and antennas, and high sensing accuracy and imaging resolution. Challenges arise with these application opportunities when it comes to realizing prototype or demonstrators in practice. This thesis proposes some of the solutions addressing such challenges in a laboratory environment.High data rate millimeter-wave transmission experiments have been demonstrated with the help of advanced instrumentations. These demonstrations show the potential of transceiver chipsets. On the other hand, the real-time communication demonstrations are limited to either low modulation order signals or low symbol rate transmissions. The reason for that is the lack of commercially available high-speed analog-to-digital converters (ADCs); therefore, conventional digital synchronization methods are difficult to implement in real-time systems at very high data rates. In this thesis, two synchronous baseband receivers are proposed with carrier recovery subsystems which only require low-speed ADCs [A][B].Besides synchronization, high-frequency signal generation is also a challenge in millimeter-wave communications. The frequency divider is a critical component of a millimeter-wave frequency synthesizer. Having both wide locking range and high working frequencies is a challenge. In this thesis, a tunable delay gated ring oscillator topology is proposed for dual-mode operation and bandwidth extension [C]. Millimeter-wave radar offers advantages for high accuracy sensing. Traditional millimeter-wave radar with frequency-modulated continuous-wave (FMCW), or continuous-wave (CW), all have their disadvantages. Typically, the FMCW radar cannot share the spectrum with other FMCW radars.\ua0 With limited bandwidth, the number of FMCW radars that could coexist in the same area is limited. CW radars have a limited ambiguous distance of a wavelength. In this thesis, a phase-modulated radar with micrometer accuracy is presented [D]. It is applicable in a multi-radar scenario without occupying more bandwidth, and its ambiguous distance is also much larger than the CW radar. Orthogonal frequency-division multiplexing (OFDM) radar has similar properties. However, its traditional fast calculation method, fast Fourier transform (FFT), limits its measurement accuracy. In this thesis, an accuracy enhancement technique is introduced to increase the measurement accuracy up to the micrometer level [E]

High Speed Optical Links Using CAP Modulation and Novel Equalisation Techniques

High speed optical links suffer from inter-symbol-interference (ISI) due to their limited bandwidth. Equalisation is typically used to mitigate ISI and therefore improve the link capacity. This dissertation explores novel equalisation techniques for carrierless amplitude and phase (CAP) modulation based optical communication systems including OM4 based and plastic optical fibre (POF) based links. An 850 nm VCSEL based OM4 link using CAP-16 scheme is studied. For the first time, the CAP equaliser, is proposed to mitigate both crosstalk channel interference (CCI) and ISI in the link at the receiver side. Performance comparisons are studied between the CAP-16 scheme using CAP equaliser and a conventional equaliser, pulse amplitude modulation (PAM-4) scheme, and discrete multitone (DMT) scheme. CAP based data transmission of 112 Gb/s is achieved over 150 m OM4 fibre with this novel equaliser, while the conventional equaliser can only support over 1 m OM4 fibre and fails to recover the signals at the same data rate. In addition, this novel equaliser provides a 1.2 dB and 1.7 dB improvement in receiver sensitivity over PAM-4 and DMT schemes, respectively, at 112 Gb/s over 100 m OM4 fibre. A novel pre-CAP-equaliser solving CCI at the transmitter side is also proposed. Data transmission of 56 Gb/s over 100 m OM4 fibre is reported experimentally with an improvement of 0.7 dB in receiver sensitivity compared to using the CAP equaliser at the receiver side. A simulation study shows a 2 dB improvement in receiver sensitivity at 112 Gb/s over 100 m OM4 fibre. Furthermore, an artificial neural network (ANN) equaliser in conjunction with the CAP equaliser structure is explored in a VCSEL based OM4 fibre link in order to further mitigate the nonlinear impairments. For 112 Gb/s data transmission over 100 m OM4 fibre, a 2.4 dB improvement of receiver sensitivity is achieved compared to the CAP equaliser. In addition to the electrical equalisers, a monolithically integrated silicon optical equaliser consisting of three taps is used for 50 Gb/s data transmission. After 10 km standard single mode fibre (SSMF), error free eye diagrams at the receiver are demonstrated. A μLED based POF link based on an APD receiver is also investigated with the CAP equaliser at the receiver side. Data transmission rates of 4 Gb/s over 25 m and 5 Gb/s over 10 m POF links are demonstrated with this equaliser while the conventional equaliser can only support 4 Gb/s over 10 m and fails to recover the signals for 5 Gb/s data transmission

An integrated CMOS optical receiver with clock and data recovery Circuit

Traditional implementations of optical receivers are designed to operate with external photodetectors or require integration in a hybrid technology. By integrating a CMOS photodetector monolithically with an optical receiver, it can lead to the advantage of speed performance and cost. This dissertation describes the implementation of a photodetector in CMOS technology and the design of an optical receiver front-end and a clock and data recovery system. The CMOS detector converts the light input into an electrical signal, which is then amplified by the receiver front-end. The recovery system subsequently processes the amplified signal to extract the clock signal and retime the data. An inductive peaking methodology has been used extensively in the front-end. It allows the accomplishment of a necessary gain to compensate for an underperformed responsivity from the photodetector. The recovery circuits based on a nonlinear circuit technique were designed to detect the timing information contained in the data input. The clock and data recovery system consists of two units viz. a frequency-locked loop and a phase-locked loop. The frequency-locked loop adjusts the oscillator’s frequency to the vicinity of data rate before phase locking takes place. The phase-locked loop detects the relative locations between the data transition and the clock edge. It then synchronises the input data to the clock signal generated by the oscillator. A system level simulation was performed and it was found to function correctly and to comply with the gigabit fibre channel specification.Dissertation (MEng (Micro-Electronics))--University of Pretoria, 2007.Electrical, Electronic and Computer Engineeringunrestricte

State of the art in chip-to-chip interconnects

This thesis presents a study of short-range links for chips mounted in the same package, on printed circuit boards or interposers. Implemented in CMOS technology between 7 and 250 nm, with links that operate at a data rate between 0,4 and 112 Gb/s/pin and with energy efficiencies from 0,3 to 67,7 pJ/bit. The links operate on channels with an attenuation lower than 50 dB. A comparison is made with graphical representations between the different articles that shows the correlation between the different essential metrics of chip-to-chip interconnects, as well as its evolution over the last 20 years.Esta tesis presenta un estudio de enlaces de corto alcance para chips montados en un mismo paquete, en placas de circuito impreso o intercaladores. Implementado en tecnología CMOS entre 7 y 250 nm, con enlaces que operan a una velocidad de datos entre 0,4 y 112 Gb/s/pin y con eficiencias energéticas de 0,3 a 67,7 pJ/bit. Los enlaces operan en canales con una atenuación inferior a 50 dB. Se realiza una comparación con representaciones gráficas entre los diferentes artículos que muestra la correlación entre las distintas métricas esenciales de las interconexiones chip a chip, así como su evolución en los últimos 20 años.Aquesta tesi presenta un estudi d'enllaços de curt abast per a xips muntats en el mateix paquet, en plaques de circuits impresos o interposers. Implementat en tecnologia CMOS entre 7 i 250 nm, amb enllaços que funcionen a una velocitat de dades entre 0,4 i 112 Gb/s/pin i amb eficiències energètiques de 0,3 a 67,7 pJ/bit. Els enllaços funcionen en canals amb una atenuació inferior a 50 dB. Es fa una comparació amb representacions gràfiques entre els diferents articles que mostra la correlació entre les diferents mètriques essencials d'interconnexions xip a xip, així com la seva evolució en els darrers 20 anys

Wideband integrated circuits for optical communication systems

The exponential growth of internet traffic drives datacenters to constantly improvetheir capacity. Several research and industrial organizations are aiming towardsTbps Ethernet and beyond, which brings new challenges to the field of high-speedbroadband electronic circuit design. With datacenters rapidly becoming significantenergy consumers on the global scale, the energy efficiency of the optical interconnecttransceivers takes a primary role in the development of novel systems. Furthermore,wideband optical links are finding application inside very high throughput satellite(V/HTS) payloads used in the ever-expanding cloud of telecommunication satellites,enabled by the maturity of the existing fiber based optical links and the hightechnology readiness level of radiation hardened integrated circuit processes. Thereare several additional challenges unique in the design of a wideband optical system.The overall system noise must be optimized for the specific application, modulationscheme, PD and laser characteristics. Most state-of-the-art wideband circuits are builton high-end semiconductor SiGe and InP technologies. However, each technologydemands specific design decisions to be made in order to get low noise, high energyefficiency and adequate bandwidth. In order to overcome the frequency limitationsof the optoelectronic components, bandwidth enhancement and channel equalizationtechniques are used. In this work various blocks of optical communication systems aredesigned attempting to tackle some of the aforementioned challenges. Two TIA front-end topologies with 133 GHz bandwidth, a CB and a CE with shunt-shunt feedback,are designed and measured, utilizing a state-of-the-art 130 nm InP DHBT technology.A modular equalizer block built in 130 nm SiGe HBT technology is presented. Threeultra-wideband traveling wave amplifiers, a 4-cell, a single cell and a matrix single-stage, are designed in a 250 nm InP DHBT process to test the limits of distributedamplification. A differential VCSEL driver circuit is designed and integrated in a4x 28 Gbps transceiver system for intra-satellite optical communications based in arad-hard 130nm SiGe process

Silicon Photonic Subsystems for Inter-Chip Optical Networks

The continuous growth of electronic compute and memory nodes in terms of the number of I/O pins, bandwidth, and areal throughput poses major integration and packaging challenges associated with offloading multi-Tbit/s data rates within the few pJ/bit targets. While integrated photonics are already deployed in long and short distances such as inter and intra data centers communications, the promising characteristics of the silicon photonic platform set it as the future technology for optical interconnects in ultra short inter-chip distances. The high index contrast between the waveguide and the cladding together with strong thermo-optic and carrier effects in silicon allows developing a wide range of micro-scale and low power optical devices compatible with the CMOS fabrication processes. Furthermore, the availability of photonic foundries and new electrical and optical co-packaging techniques further pushes this platform for the next steps of commercial deployment. The work in this dissertation presents the current trends in high-performance memory and processor nodes and gives motivation for disaggregated and reconfigurable inter-chip network enabled with the silicon photonic layer. A dense WDM transceiver and broadband switch architectures are discussed to support a bi-directional network of ten hybrid-memory cubes (HMC) interconnected to ten processor nodes with an overall aggregated bandwidth of 9.6Tbit/s. Latency and energy consumption are key performance parameters in a processor to primary memory nodes connectivity. The transceiver design is based on energy-efficient micro-ring resonators, and the broadband switch is constructed with 2x2 Mach-Zehnder elements for nano-second reconfiguration. Each transceiver is based on hundreds of micro-rings to convert the native HMC electrical protocol to the optical domain and the switch is based on tens of hundreds of 2x2 elements to achieve non-blocking all-to-all connectivity. The next chapters focus on developing methods for controlling and monitoring such complex and highly integrated silicon photonic subsystems. The thermo-optic effect is characterized and we show experimentally that the phase of the optical carrier can be reliably controlled with pulse-width modulation (PWM) signal, ultimately relaxing the need for hundreds of digital to analog converters (DACs). We further show that doped waveguide heaters can be utilized as \textit{in-line} optical power monitors by measuring photo-conductance current, which is an alternative for the conventional tapping and integration of photo-diodes. The next part concerned with a common cascaded micro-ring resonator in a WDM transceiver design. We develop on an FPGA control algorithm that abstracts the physical layer and takes user-defined inputs to set the resonances to the desired wavelength in a unicast and multicast transmission modes. The associated sensitivities of these silicon ring resonators are presented and addressed with three closed-loop solutions. We first show a closed-loop operation based on tapping the error signal from the drop port of the micro-ring. The second solution presents a resonance wavelength locking with a single digital I/O for control and feedback signals. Lastly, we leverage the photo-conductance effect and demonstrate the locking procedure using only the doped heater for both control and feedback purposes. To achieve the inter-chip reconfigurability we discuss recent advances of high-port-count SiP broadband switches for reconfigurable inter-chip networks. To ensure optimal operation in terms of low insertion loss, low cross-talk and high signal integrity per routing path, hundreds of 2x2 Mach-Zehnder elements need to be biased precisely for the cross and bar states. We address this challenge with a tapless and a design agnostic calibration approach based on the photo-conductance effect. The automated algorithm returns a look-up table for all for each 2x2 element and the associated calibrated biases. Each routing scenario is then tested for insertion loss, crosstalk and bit-error rate of 25Gbit/s 4-level pulse amplitude modulation signals. The last part utilizes the Mach-Zehnder interferometers in WDM transceiver applications. We demonstrate a polarization insensitive four-channel WDM receiver with 40Gbit/s per channel and a transmitter design generating 8-level pulse amplitude modulation signals at 30Gbit/s

Mapping multiplexing technique (MMT): a novel intensity modulated transmission format for high-speed optical communication systems

There is a huge rapid growth in the deployment of data centers, mainly driven from the increasing demand of internet services as video streaming, e-commerce, Internet Of Things (IOT), social media, and cloud computing. This led data centers to experience an expeditious increase in the amount of network traffic that they have to sustain due to requirement of scaling with the processing speed of Complementary metal–oxide–semiconductor (CMOS) technology. On the other side, as more and more data centers and processing cores are on demand, as the power consumption is becoming a challenging issue. Unless novel power efficient methodologies are innovated, the information technology industry will be more liable to a future power crunch. As such, low complex novel transmission formats featuring both power efficiency and low cost are considered the major characteristics enabling large-scale, high performance data transmission environment for short-haul optical interconnects and metropolitan range data networks. In this thesis, a novel high-speed Intensity-Modulated Direct-Detection (IM/DD) transmission format named “Mapping Multiplexing Technique (MMT)” for high-speed optical fiber networks, is proposed and presented. Conceptually, MMT design challenges the high power consumption issue that exists in high-speed short and medium range networks. The proposed novel scheme provides low complex means for increasing the power efficiency of optical transceivers at an impactful tradeoff between power efficiency, spectral efficiency, and cost. The novel scheme has been registered as a patent (Malaysia PI2012700631) that can be employed for applications related but not limited to, short-haul optical interconnects in data centers and Metropolitan Area networks (MAN). A comprehensive mathematical model for N-channel MMT modulation format has been developed. In addition, a signal space model for the N-channel MMT has been presented to serve as a platform for comparison with other transmission formats under optical channel constraints. Especially, comparison with M-PAM, as meanwhile are of practical interest to expand the capacity for optical interconnects deployment which has been recently standardized for Ethernet IEEE 802.3bs 100Gb/s and in today ongoing investigation activities by IEEE 802.3 400Gb/s Ethernet Task Force. Performance metrics have been considered by the derivation of the average electrical and optical power for N-channel MMT symbols in comparison with Pulse Amplitude Modulation (M-PAM) format with respect to the information capacity. Asymptotic power efficiency evaluation in multi-dimensional signal space has been considered. For information capacity of 2, 3 and 4 bits/symbol, 2-channel, 3-channel and 4-channel MMT modulation formats can reduce the power penalty by 1.76 dB, 2.2 dB and 4 dB compared with 4-PAM, 8-PAM and 16-PAM, respectively. This enhancement is equivalent to 53%, 60% and 71% energy per bit reduction to the transmission of 2, 3 and 4 bits per symbol employing 2-, 3- and 4-channel MMT compared with 4-, 8- and 16-PAM format, respectively. One of the major dependable parameters that affect the immunity of a modulation format to fiber non-linearities, is the system baud rate. The propagation of pulses in fiber with bitrates in the order > 10G, is not only limited by the linear fiber impairments, however, it has strong proportionality with fiber intra-channel non-linearities (Self Phase Modulation (SPM), Intra-channel Cross-Phase Modulation (IXPM) and Intra-channel Four-Wave Mixing (IFWM)). Hence, in addition to the potential application of MMT in short-haul networks, the thesis validates the practicality of implementing N-channel MMT system accompanied by dispersion compensation methodologies to extend the reach of error free transmission (BER ≤ 10-12) for Metro-networks. N-Channel MMT has been validated by real environment simulation results to outperform the performance of M-PAM in tolerating fiber non-linearities. By the employment of pre-post compensation to tolerate both residual chromatic dispersion and non-linearity, performance above the error free transmission limit at 40Gb/s bit rate have been attained for 2-, 3- and 4-channel MMT over spans lengths of up to 1200Km, 320 Km and 320 Km, respectively. While, at an aggregated bit rate of 100 Gb/s, error free transmission can be achieved for 2-, 3- and 4-channel MMT over spans lengths of up to 480 Km, 80 Km and 160 Km, respectively. At the same spectral efficiency, 4-channel MMT has realized a single channel maximum error free transmission over span lengths up to 320 Km and 160 Km at 40Gb/s and 100Gb/s, respectively, in contrast with 4-PAM attaining 240 Km and 80 Km at 40Gb/s and 100Gb/s, respectively

Topical Workshop on Electronics for Particle Physics

The purpose of the workshop was to present results and original concepts for electronics research and development relevant to particle physics experiments as well as accelerator and beam instrumentation at future facilities; to review the status of electronics for the LHC experiments; to identify and encourage common efforts for the development of electronics; and to promote information exchange and collaboration in the relevant engineering and physics communities

Mapping multiplexing technique (MMT): a novel intensity modulated transmission format for high-speed optical communication systems

There is a huge rapid growth in the deployment of data centers, mainly driven from the increasing demand of internet services as video streaming, e-commerce, Internet Of Things (IOT), social media, and cloud computing. This led data centers to experience an expeditious increase in the amount of network traffic that they have to sustain due to requirement of scaling with the processing speed of Complementary metal–oxide–semiconductor (CMOS) technology. On the other side, as more and more data centers and processing cores are on demand, as the power consumption is becoming a challenging issue. Unless novel power efficient methodologies are innovated, the information technology industry will be more liable to a future power crunch. As such, low complex novel transmission formats featuring both power efficiency and low cost are considered the major characteristics enabling large-scale, high performance data transmission environment for short-haul optical interconnects and metropolitan range data networks. In this thesis, a novel high-speed Intensity-Modulated Direct-Detection (IM/DD) transmission format named “Mapping Multiplexing Technique (MMT)” for high-speed optical fiber networks, is proposed and presented. Conceptually, MMT design challenges the high power consumption issue that exists in high-speed short and medium range networks. The proposed novel scheme provides low complex means for increasing the power efficiency of optical transceivers at an impactful tradeoff between power efficiency, spectral efficiency, and cost. The novel scheme has been registered as a patent (Malaysia PI2012700631) that can be employed for applications related but not limited to, short-haul optical interconnects in data centers and Metropolitan Area networks (MAN). A comprehensive mathematical model for N-channel MMT modulation format has been developed. In addition, a signal space model for the N-channel MMT has been presented to serve as a platform for comparison with other transmission formats under optical channel constraints. Especially, comparison with M-PAM, as meanwhile are of practical interest to expand the capacity for optical interconnects deployment which has been recently standardized for Ethernet IEEE 802.3bs 100Gb/s and in today ongoing investigation activities by IEEE 802.3 400Gb/s Ethernet Task Force. Performance metrics have been considered by the derivation of the average electrical and optical power for N-channel MMT symbols in comparison with Pulse Amplitude Modulation (M-PAM) format with respect to the information capacity. Asymptotic power efficiency evaluation in multi-dimensional signal space has been considered. For information capacity of 2, 3 and 4 bits/symbol, 2-channel, 3-channel and 4-channel MMT modulation formats can reduce the power penalty by 1.76 dB, 2.2 dB and 4 dB compared with 4-PAM, 8-PAM and 16-PAM, respectively. This enhancement is equivalent to 53%, 60% and 71% energy per bit reduction to the transmission of 2, 3 and 4 bits per symbol employing 2-, 3- and 4-channel MMT compared with 4-, 8- and 16-PAM format, respectively. One of the major dependable parameters that affect the immunity of a modulation format to fiber non-linearities, is the system baud rate. The propagation of pulses in fiber with bitrates in the order > 10G, is not only limited by the linear fiber impairments, however, it has strong proportionality with fiber intra-channel non-linearities (Self Phase Modulation (SPM), Intra-channel Cross-Phase Modulation (IXPM) and Intra-channel Four-Wave Mixing (IFWM)). Hence, in addition to the potential application of MMT in short-haul networks, the thesis validates the practicality of implementing N-channel MMT system accompanied by dispersion compensation methodologies to extend the reach of error free transmission (BER ≤ 10-12) for Metro-networks. N-Channel MMT has been validated by real environment simulation results to outperform the performance of M-PAM in tolerating fiber non-linearities. By the employment of pre-post compensation to tolerate both residual chromatic dispersion and non-linearity, performance above the error free transmission limit at 40Gb/s bit rate have been attained for 2-, 3- and 4-channel MMT over spans lengths of up to 1200Km, 320 Km and 320 Km, respectively. While, at an aggregated bit rate of 100 Gb/s, error free transmission can be achieved for 2-, 3- and 4-channel MMT over spans lengths of up to 480 Km, 80 Km and 160 Km, respectively. At the same spectral efficiency, 4-channel MMT has realized a single channel maximum error free transmission over span lengths up to 320 Km and 160 Km at 40Gb/s and 100Gb/s, respectively, in contrast with 4-PAM attaining 240 Km and 80 Km at 40Gb/s and 100Gb/s, respectively