Flip chip packaging of digital silicon photonics MEMS Switch for cloud computing and data centre

We report on the flip chip packaging of Micro-Electro-Mechanical System (MEMS)-based digital silicon photonic switching device and the characterization results of 12 × 12 switching ports. The challenges in packaging N2 electrical and 2N optical interconnections are addressed with single-layer electrical redistribution lines of 25 µm line width and space on aluminum nitride interposer and 13° polished 64-channel lidless fiber array (FA) with a pitch of 127 µm. 50 µm diameter solder spheres are laser-jetted onto the electrical bond pads surrounded by suspended MEMS actuators on the device before fluxless flip-chip bonding. A lidless FA is finally coupled near-vertically onto the device gratings using a 6-degree-of-freedom (6-DOF) alignment system. Fiber-to-grating coupler loss of 4.25 dB/facet, 10–11 bit error rate (BER) through the longest optical path, and 0.4 µs switch reconfiguration time have been demonstrated using 10 Gb/s Ethernet data stream

MEMS for Photonic Integrated Circuits

The field of microelectromechanical Systems (MEMS) for photonic integrated circuits (PICs) is reviewed. This field leverages mechanics at the nanometer to micrometer scale to improve existing components and introduce novel functionalities in PICs. This review covers the MEMS actuation principles and the mechanical tuning mechanisms for integrated photonics. The state of the art of MEMS tunable components in PICs is quantitatively reviewed and critically assessed with respect to suitability for large-scale integration in existing PIC technology platforms. MEMS provide a powerful approach to overcome current limitations in PIC technologies and to enable a new design dimension with a wide range of applications

High capacity photonic integrated switching circuits

As the demand for high-capacity data transfer keeps increasing in high performance computing and in a broader range of system area networking environments; reconfiguring the strained networks at ever faster speeds with larger volumes of traffic has become a huge challenge. Formidable bottlenecks appear at the physical layer of these switched interconnects due to its energy consumption and footprint. The energy consumption of the highly sophisticated but increasingly unwieldy electronic switching systems is growing rapidly with line rate, and their designs are already being constrained by heat and power management issues. The routing of multi-Terabit/second data using optical techniques has been targeted by leading international industrial and academic research labs. So far the work has relied largely on discrete components which are bulky and incurconsiderable networking complexity. The integration of the most promising architectures is required in a way which fully leverages the advantages of photonic technologies. Photonic integration technologies offer the promise of low power consumption and reduced footprint. In particular, photonic integrated semiconductor optical amplifier (SOA) gate-based circuits have received much attention as a potential solution. SOA gates exhibit multi-terahertz bandwidths and can be switched from a high-gain state to a high-loss state within a nanosecond using low-voltage electronics. In addition, in contrast to the electronic switching systems, their energy consumption does not rise with line rate. This dissertation will discuss, through the use of different kind of materials and integration technologies, that photonic integrated SOA-based optoelectronic switches can be scalable in either connectivity or data capacity and are poised to become a key technology for very high-speed applications. In Chapter 2, the optical switching background with the drawbacks of optical switches using electronic cores is discussed. The current optical technologies for switching are reviewed with special attention given to the SOA-based switches. Chapter 3 discusses the first demonstrations using quantum dot (QD) material to develop scalable and compact switching matrices operating in the 1.55µm telecommunication window. In Chapter 4, the capacity limitations of scalable quantum well (QW) SOA-based multistage switches is assessed through experimental studies for the first time. In Chapter 5 theoretical analysis on the dependence of data integrity as ultrahigh line-rate and number of monolithically integrated SOA-stages increases is discussed. Chapter 6 presents some designs for the next generation of large scale photonic integrated interconnects. A 16x16 switch architecture is described from its blocking properties to the new miniaturized elements proposed. Finally, Chapter 7 presents several recommendations for future work, along with some concluding remark

Energy Efficient High Port Count Optical Switches

The advance of internet applications, such as video streaming, big data and cloud computing, is reshaping the telecommunication and internet industries. Bandwidth demands in datacentres have been boosted by these emerging data-hungry internet applications. Regarding inter- and intra-datacentre communications, fine-grained data need to be exchanged across a large shared memory space. Large-scale high-speed optical switches tend to use a rearrangeably non-blocking architecture as this limits the number of switching elements required. However, this comes at the expense of requiring more sophisticated route selection within the switch and also some forms of time-slotted protocols. The looping algorithm is the classical routing algorithm to set up paths in rearrangeably non-blocking switches. It was born in the electronic switch era, where all links in the switches are equal. It is, therefore, not able to accommodate loss difference between optical paths due to the different length of waveguides and distinct numbers of crossings, and bends, leading to sub-optimal performance. We, therefore, propose an advanced path-selection algorithm based on the looping algorithm that minimises the path-dependent loss. It explores all possible set-ups for a given connection assignment and selects the optimal one. It guarantees that no individual path would have a sufficiently substantial loss, therefore, improve the overall performance of the switch. The performance of the proposed algorithm has been assessed by modelling switches using the VPI simulator. An 8×8 Clos-tree switch demonstrates a 2.7dB decrease in loss and 1.9dB improvement in IPDR with 1.5 dB penalty for the worst case. An 8×8 dilated Beneš shows more than 4 dB loss reduction for the lossiest path and 1.4 dB IPDR improvement for 1 dB power penalty. The improved algorithm can be run once for each switch design and store its output in a compact lookup table, enabling rapid switch reconfiguration. Microelectromechanical systems (MEMS) based optical switches have been fabricated with over 1,000 ports which meet the port count requirements in data centre networks. However, the reconfiguration speed of the MEMS switches is limited to the millisecond to microsecond timescale, which is not sufficient for packet switching in datacentres. Opto-electronic devices, such as Mach-Zehnder Interferometers (MZIs) and semiconductor optical amplifiers (SOAs) with nanosecond response time show the potential to fulfil the requirements of packet switching. However, the scalability of MZI switches is inherently limited by insertion loss and accumulated crosstalk, while the scalability of SOA switches is restricted by accumulated noise and distortion. We, therefore, have proposed a dilated Beneš hybrid MZI-SOA design, where MZIs are implemented as 1×2 or 2×1 low-loss switching elements, minimising crosstalk by using a single input, and where short SOAs are included as gain or absorption units, offering either loss compensation or crosstalk suppression though adding only minimal noise and distortion. A 4×4 device has been fabricated and exhibits a mere 1.3dB loss, an extinction ratio of 47dB, and more than 13dB IPDR for a 0.5dB power penalty. When operating with 10 Gb/s per port, 6pJ/bit energy consumption is demonstrated, delivering 20% reduced energy consumption compared with SOA-based switches. The tolerance of the current control accuracy of this switch is very broad. Within a 5 mA bias current range, the power penalty can be maintained below 0.2 dB for 8 dB IPDR and 12 mA for 10 dB IPDR with a penalty less 0.5 dB. The excellent crosstalk and power penalty performance demonstrated by this chip enable the scalability of this hybrid approach. The performance of 16×16 port dilated Beneš hybrid switch is experimentally assessed by cascading 4×4 switch chips, demonstrating an IPDR of 15 dB at a 1 dB penalty with a 0.6 dB power penalty floor. In terms of switches with port count larger than 16×16, the power penalty performance has been analysed with physical layer simulations fitted with state-of-the-art data. We assess the feasibility of three potential topologies, with different architectural optimisations: dilated Beneš, Beneš and Clos-Beneš. Quantitative analysis for switches with up to 2048 ports is presented, achieving a 1.15dB penalty for a BER of 10-3, compatible with soft-decision forward error correction.Cambridge Overseas Trust; China Scholarship Council

Evolutionary Trends in True Time Delay Line Technologies for Timed Array Radars

Timed array technology is rapidly evolving in multiple areas such as high resolution imaging radar, automotive, medical, high data rate communication applications etc. Timed arrays by utilising True Time Delay (TTD) lines in place of phase shifters mitigate beam squint and pulse dispersion issues associated with wide instantaneous bandwidth arrays. This paper presents on review of evolutionary trends in TTD line architectures starting from coaxial cable to photonic integrated circuit. The paper also reports on critical parameters of TTD lines, their importance and implication in design of typical X-band imaging radar. Comparison of different TTD line architectures in terms of configuration, implementation, merits and demerits are discussed in detail for wideband array application. The paper also brings out the integration aspects of TTD lines as part of T/R modules and proposes suitable design schemes towards performance optimization and realisation of timed arrays

Toward a new generation of photonic devices based on the integration of metal oxides in silicon technology

[ES] La búsqueda de nuevas soluciones e ideas innovadoras en el campo de la fotónica de silicio mediante la integración de nuevos materiales con prestaciones únicas es un tema de alta actualidad entre la comunidad científica en fotónica y con un impacto potencial muy alto. Dentro de esta temática, esta tesis pretende contribuir hacia una nueva generación de dispositivos fotónicos basados en la integración de óxidos metálicos en tecnología de silicio. Los óxidos metálicos elegidos pertenecen a la familia de óxidos conductores transparentes (TCO), concretamente el óxido de indio y estaño (ITO) y el óxido de cadmio (CdO), y materiales de cambio de fase (PCM) como el dióxido de vanadio (VO2). Dichos materiales se caracterizan especialmente por una variación drástica de sus propiedades optoelectrónicas, tales como la resistividad o el índice de refracción, frente a un estímulo externo ya sea en forma de temperatura, aplicación de un campo eléctrico o excitación óptica. De esta forma, nuestro objetivo es diseñar, fabricar y demostrar experimentalmente nuevas soluciones y dispositivos clave tales como dispositivos no volátiles, desfasadores y dispositivos con no linealidad óptica. Tales dispositivos podrían encontrar potencial utilidad en diversas aplicaciones que comprenden las comunicaciones ópticas, redes neuronales, LiDAR, computación, cuántica, entre otros. Las prestaciones clave en las que se pretende dar un salto disruptivo son el tamaño y capacidad para una alta densidad de integración, el consumo de potencia, y el ancho de banda.[CA] La recerca de noves solucions i idees innovadores al camp de la fotònica de silici mitjançant la integració de nous materials amb prestacions úniques és un tema d'alta actualitat entre la comunitat científica en fotònica i amb un impacte potencial molt alt. D'aquesta temàtica, aquesta tesi pretén contribuir cap a una nova generació de dispositius fotònics basats en la integració d'òxids metàl·lics en tecnologia de silici. Els òxids metàl·lics elegits pertanyen a la família d'òxids conductors transparents (TCO), concretament l'òxid d'indi i estany (ITO) i l'òxid de cadmi (CdO), i materials de canvi de fase (PCM) com el diòxid de vanadi (VO2). Aquests materials es caracteritzen especialment per una variació dràstica de les propietats optoelectròniques, com ara la resistivitat o l'índex de refracció, davant d'un estímul extern ja siga en forma de temperatura, aplicació d'un camp elèctric o excitació òptica. D'aquesta manera, el nostre objectiu és dissenyar, fabricar i demostrar experimentalment noves solucions i dispositius clau com ara dispositius no volàtils, desfasadors i dispositius amb no-linealitat òptica. Aquests dispositius podrien trobar potencial utilitat en diverses aplicacions que comprenen les comunicacions òptiques, xarxes neuronals, LiDAR, computació, quàntica, entre d'altres. Les prestacions clau en què es pretén fer un salt disruptiu són la grandària i la capacitat per a una alta densitat d'integració, el consum de potència i l'amplada de banda.[EN] The search for new solutions and innovative ideas in the field of silicon photonics through the integration of new materials featuring unique optoelectronic properties is a hot topic among the photonics scientific community with a very high potential impact. Within this topic, this thesis aims to contribute to a new generation of photonic devices based on the integration of metal oxides in silicon technology. The chosen metal oxides belong to the family of transparent conducting oxides (TCOs), namely indium tin oxide (ITO) and cadmium oxide (CdO), and phase change materials (PCMs) such as vanadium dioxide (VO2). These materials are characterized by a drastic variation of their optoelectronic properties, such as resistivity or refractive index, in response to an external stimulus either in the form of temperature, application of an electric field, or optical excitation. Therefore, our objective is to design, fabricate and experimentally demonstrate new solutions and key devices such as non-volatile devices, phase shifters, and devices with optical nonlinearity. Such devices could find potential utility in several applications, including optical communications, neural networks, LiDAR, computing, and quantum. The key features in which we aim to take a leapfrog are footprint and capacity for high integration density, power consumption, and bandwidth.This work is supported in part by grants ACIF/2018/172 funded by Generaliltat Valenciana, and FPU17/04224 funded by MCIN/AEI/10.13039/501100011033 and by “ESF Investing in your future”.Parra Gómez, J. (2022). Toward a new generation of photonic devices based on the integration of metal oxides in silicon technology [Tesis doctoral]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/19088

Advances in High-Resolution Microscale Impedance Sensors

Sensors based on impedance transduction have been well consolidated in the industry for decades. Today, the downscaling of the size of sensing elements to micrometric and submicrometric dimensions is enabled by the diffusion of lithographic processes and fostered by the convergence of complementary disciplines such as microelectronics, photonics, biology, electrochemistry, and material science, all focusing on energy and information manipulation at the micro- and nanoscale. Although such a miniaturization trend is pivotal in supporting the pervasiveness of sensors (in the context of mass deployment paradigms such as smart city, home and body monitoring networks, and Internet of Things), it also presents new challenges for the detection electronics, reaching the zeptoFarad domain. In this tutorial review, a selection of examples is illustrated with the purpose of distilling key indications and guidelines for the design of high-resolution impedance readout circuits and sensors. The applications span from biological cells to inertial and ultrasonic MEMS sensors, environmental monitoring, and integrated photonics

Control Plane Hardware Design for Optical Packet Switched Data Centre Networks

Optical packet switching for intra-data centre networks is key to addressing traffic requirements. Photonic integration and wavelength division multiplexing (WDM) can overcome bandwidth limits in switching systems. A promising technology to build a nanosecond-reconfigurable photonic-integrated switch, compatible with WDM, is the semiconductor optical amplifier (SOA). SOAs are typically used as gating elements in a broadcast-and-select (B\&S) configuration, to build an optical crossbar switch. For larger-size switching, a three-stage Clos network, based on crossbar nodes, is a viable architecture. However, the design of the switch control plane, is one of the barriers to packet switching; it should run on packet timescales, which becomes increasingly challenging as line rates get higher. The scheduler, used for the allocation of switch paths, limits control clock speed. To this end, the research contribution was the design of highly parallel hardware schedulers for crossbar and Clos network switches. On a field-programmable gate array (FPGA), the minimum scheduler clock period achieved was 5.0~ns and 5.4~ns, for a 32-port crossbar and Clos switch, respectively. By using parallel path allocation modules, one per Clos node, a minimum clock period of 7.0~ns was achieved, for a 256-port switch. For scheduler application-specific integrated circuit (ASIC) synthesis, this reduces to 2.0~ns; a record result enabling scalable packet switching. Furthermore, the control plane was demonstrated experimentally. Moreover, a cycle-accurate network emulator was developed to evaluate switch performance. Results showed a switch saturation throughput at a traffic load 60\% of capacity, with sub-microsecond packet latency, for a 256-port Clos switch, outperforming state-of-the-art optical packet switches

The rising role of photonics in today's data centres

In recent years there has been a rapid growth in demand for ultra high speed data transmission with end users expecting fast, high bandwidth network access. This growth has put data centres under increasing pressure to provide greater data throughput and ever increasing data rates while at the same time improving the quality of data handling in terms of reduced latency, increased scalability and improved channel speed for users. However, data networks are becoming increasingly difficult to scale to meet this growing demand using current well established CMOS technology and architectures. As a result electronic bottlenecks are becoming apparent despite improvements in data management. The inter-related issues of electronic scalability, power consumption, copper interconnect bandwidth and the limited speed of CMOS electronics will be discussed; and the tremendous potential of optical fibre based networks to provide the necessary bandwidth will be illustrated. In addition, some applications of photonics to alleviate speed, throughput and latency issues in data networks will be discussed. Finally, progress in the form of a novel and highly scalable optical interconnect will be reviewed

High-index-contrast electromechanical optical switches

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, June 2011."June 2011." Cataloged from PDF version of thesis.Includes bibliographical references (p. 278-288).System developers are looking to replace protocol-dependent, bandwidth-limited optical networks with intelligent optically-transparent integrated photonic networks. Several electromechanical optical switches are explored with the intent of being utilized as optical switching elements in transparent, integrated photonic networks. The electromechanical optical switches are based on high-index-contrast waveguide optics that is integrated with electrostatic parallel plate actuators on submicron scales. High-index-contrast waveguides are attractive due to their reduced bending radius and low in-plane scattering and optical loss. These qualities of high-index-contrast waveguides make them uniquely suited for low-cost, large-scale integration. The parallel plate actuators are used to control the waveguide light switching by mechanically establishing and terminating light pathways on time scales well below 100s of microseconds. Investigations of light pathway coupling schemes and parallel plate actuator configurations led to the development of several device structures that are categorized in three distinct device generations. Design premiums were placed upon device footprint minimization, polarization independence, high extinction ratios, and operational robustness.by Reginald Eugene Bryant.Ph.D