MARACAS: a real-time multicore VCPU scheduling framework

This paper describes a multicore scheduling and load-balancing framework called MARACAS, to address shared cache and memory bus contention. It builds upon prior work centered around the concept of virtual CPU (VCPU) scheduling. Threads are associated with VCPUs that have periodically replenished time budgets. VCPUs are guaranteed to receive their periodic budgets even if they are migrated between cores. A load balancing algorithm ensures VCPUs are mapped to cores to fairly distribute surplus CPU cycles, after ensuring VCPU timing guarantees. MARACAS uses surplus cycles to throttle the execution of threads running on specific cores when memory contention exceeds a certain threshold. This enables threads on other cores to make better progress without interference from co-runners. Our scheduling framework features a novel memory-aware scheduling approach that uses performance counters to derive an average memory request latency. We show that latency-based memory throttling is more effective than rate-based memory access control in reducing bus contention. MARACAS also supports cache-aware scheduling and migration using page recoloring to improve performance isolation amongst VCPUs. Experiments show how MARACAS reduces multicore resource contention, leading to improved task progress.http://www.cs.bu.edu/fac/richwest/papers/rtss_2016.pdfAccepted manuscrip

Vector computer memory bank contention

A number of vector supercomputers feature very large memories. Unfortunately the large capacity memory chips that are used in these computers are much slower than the fast central processing unit (CPU) circuitry. As a result, memory bank reservation times (in CPU ticks) are much longer than on previous generations of computers. A consequence of these long reservation times is that memory bank contention is sharply increased, resulting in significantly lowered performance rates. The phenomenon of memory bank contention in vector computers is analyzed using both a Markov chain model and a Monte Carlo simulation program. The results of this analysis indicate that future generations of supercomputers must either employ much faster memory chips or else feature very large numbers of independent memory banks

Accounting for Memory Bank Contention and Delay in High-Bandwidth Multiprocessors

This paper considers issues of memory performance in shared memory multiprocessors that provide a high-bandwidth network and in which the memory banks are slower than the processors. We are concerned with the effects of memory bank contention, memory bank delay, and the bank expansion factor (the ratio of number of banks to number of processors) on performance, particularly for irregular memory access patterns. This work was motivated by observed discrepancies between predicted and actual performance in a number of irregular algorithms implemented for the cray C90 when the memory contention at a particular location is high. We develop a formal framework for studying memory bank contention and delay, and show several results, both experimental and theoretical. We first show experimentally that our framework is a good predictor of performance on the cray C90 and J90, providing a good accounting of bank contention and delay. Second, we show that it often improves performance to have addi..

Scheduling techniques to avoid contention in multi-core systems

One of the main problems in multi-core systems is the contention of shared resources such as cache, memory controller, pre-fetcher etc. among the cores. Due to the contention among shared resources, the processing unit's performance is degraded. Scheduling of applications in such a way that it reduces the contention among shared resources is one of the promising solutions. Scheduling is considered as an efficient and best technique as it doesn't require any extra hardware or any changes to be made to the OS or its underlying kernel. Scheduling can be implemented at user level by using system calls. In the prior works it was considered that the cache contention was the main cause of performance degradation and many hardware and software techniques were found to avoid or minimize it. But further experiments proved that the contention caused by pre-fetcher and memory controller is also having significant effect on performance degradation. Many scheduling policies and classification schemes have been designed to find out an efficient scheduling algorithm. Miss rate is considered to be simple yet efficient classification scheme to classify the threads as it not only considers contention due to cache but also the memory controller and pre-fetcher. Distributed Intensity is the first scheduling algorithm discussed which uses miss rate to classify threads and assign them to all cores in an efficient way so that miss rate is shared almost equally among the cores. Then Distributed Intensity is combined with Swap algorithm to further improve the performance by using dynamic optimization. Then by further studies it is found out that miss rate cant be efficient classification technique for memory intensive workloads. So the concepts of Contentiousness and Sensitivity are introduced to improve the efficiency of scheduling algorithm and to minimize the performance degradation due to contention

The First World War between Memory and History: A Conference Retrospective

Long after the guns of the First World War went silent on 11 November 1918, the war continues to spark debate. The many points of contention were on full display at the “From Memory to History” conference, hosted by Western University in London, Ontario, over three days in November 2011. Scholars and enthusiasts from around the world gathered to share, debate, and ultimately demonstrate that the war’s many legacies are still open to interpretation, even as the centenary of the war’s outbreak approaches. Perhaps the most crucial lesson learned is that both memory and history are malleable concepts, prone to revision, and there are numerous narratives in many disciplines that remain untold, even with an event as well-documented as the First World War