High-Throughput Soft-Output MIMO Detector Based on Path-Preserving Trellis-Search Algorithm

In this paper, we propose a novel path-preserving trellis-search (PPTS) algorithm and its high-speed VLSI architecture for soft-output multiple-input-multiple-output (MIMO) detection. We represent the search space of the MIMO signal with an unconstrained trellis, where each node in stage of the trellis maps to a possible complex-valued symbol transmitted by antenna. Based on the trellis model, we convert the soft-output MIMO detection problem into a multiple shortest paths problem subject to the constraint that every trellis node must be covered in this set of paths. The PPTS detector is guaranteed to have soft information for every possible symbol transmitted on every antenna so that the log-likelihood ratio (LLR) for each transmitted data bit can be more accurately formed. Simulation results show that the PPTS algorithm can achieve near-optimal error performance with a low search complexity. The PPTS algorithm is a hardware-friendly data-parallel algorithm because the search operations are evenly distributed among multiple trellis nodes for parallel processing. As a case study, we have designed and synthesized a fully-parallel systolic-array detector and two folded detectors for a 4x4 16-QAM system using a 1.08 V TSMC 65-nm CMOS technology.With a 1.18 mm2 core area, the folded detector can achieve a throughput of 2.1 Gbps.With a 3.19 mm2 core area, the fully-parallel systolic-array detector can achieve a throughput of 6.4 Gbps

Wireless receiver designs: from information theory to VLSI implementation

Receiver design, especially equalizer design, in communications is a major concern in both academia and industry. It is a problem with both theoretical challenges and severe implementation hurdles. While much research has been focused on reducing complexity for optimal or near-optimal schemes, it is still common practice in industry to use simple techniques (such as linear equalization) that are generally significantly inferior. Although digital signal processing (DSP) technologies have been applied to wireless communications to enhance the throughput, the users' demands for more data and higher rate have revealed new challenges. For example, to collect the diversity and combat fading channels, in addition to the transmitter designs that enable the diversity, we also require the receiver to be able to collect the prepared diversity. Most wireless transmissions can be modeled as a linear block transmission system. Given a linear block transmission model assumption, maximum likelihood equalizers (MLEs) or near-ML decoders have been adopted at the receiver to collect diversity which is an important metric for performance, but these decoders exhibit high complexity. To reduce the decoding complexity, low-complexity equalizers, such as linear equalizers (LEs) and decision feedback equalizers (DFEs) are often adopted. These methods, however, may not utilize the diversity enabled by the transmitter and as a result have degraded performance compared to MLEs. In this dissertation, we will present efficient receiver designs that achieve low bit-error-rate (BER), high mutual information, and low decoding complexity. Our approach is to first investigate the error performance and mutual information of existing low-complexity equalizers to reveal the fundamental condition to achieve full diversity with LEs. We show that the fundamental condition for LEs to collect the same (outage) diversity as MLE is that the channels need to be constrained within a certain distance from orthogonality. The orthogonality deficiency (od) is adopted to quantify the distance of channels to orthogonality while other existing metrics are also introduced and compared. To meet the fundamental condition and achieve full diversity, a hybrid equalizer framework is proposed. The performance-complexity trade-off of hybrid equalizers is quantified by deriving the distribution of od. Another approach is to apply lattice reduction (LR) techniques to improve the ``quality' of channel matrices. We present two widely adopted LR methods in wireless communications, the Lenstra-Lenstra-Lovasz (LLL) algorithm [51] and Seysen's algorithm (SA), by providing detailed descriptions and pseudo codes. The properties of output matrices of the LLL algorithm and SA are also quantified. Furthermore, other LR algorithms are also briefly introduced. After introducing LR algorithms, we show how to adopt them into the wireless communication decoding process by presenting LR-aided hard-output detectors and LR-aided soft-output detectors for coded systems, respectively. We also analyze the performance of proposed efficient receivers from the perspective of diversity, mutual information, and complexity. We prove that LR techniques help to restore the diversity of low-complexity equalizers without increasing the complexity significantly. When it comes to practical systems and simulation tool, e.g., MATLAB, only finite bits are adopted to represent numbers. Therefore, we revisit the diversity analysis for finite-bit represented systems. We illustrate that the diversity of MLE for systems with finite-bit representation is determined by the number of non-vanishing eigenvalues. It is also shown that although theoretically LR-aided detectors collect the same diversity as MLE in the real/complex field, it may show different diversity orders when finite-bit representation exists. Finally, the VLSI implementation of the complex LLL algorithms is provided to verify the practicality of our proposed designs.Ph.D.Committee Chair: Ma, Xiaoli; Committee Member: Anderson, David; Committee Member: Barry, John; Committee Member: Chen, Xu-Yan; Committee Member: Kornegay, Kevi

MIMO Detection for High-Order QAM Based on a Gaussian Tree Approximation

This paper proposes a new detection algorithm for MIMO communication systems employing high order QAM constellations. The factor graph that corresponds to this problem is very loopy; in fact, it is a complete graph. Hence, a straightforward application of the Belief Propagation (BP) algorithm yields very poor results. Our algorithm is based on an optimal tree approximation of the Gaussian density of the unconstrained linear system. The finite-set constraint is then applied to obtain a loop-free discrete distribution. It is shown that even though the approximation is not directly applied to the exact discrete distribution, applying the BP algorithm to the loop-free factor graph outperforms current methods in terms of both performance and complexity. The improved performance of the proposed algorithm is demonstrated on the problem of MIMO detection

An Iterative Soft Decision Based LR-Aided MIMO Detector

The demand for wireless and high-rate communication system is increasing gradually and multiple-input-multiple-output (MIMO) is one of the feasible solutions to accommodate the growing demand for its spatial multiplexing and diversity gain. However, with high number of antennas, the computational and hardware complexity of MIMO increases exponentially. This accumulating complexity is a paramount problem in MIMO detection system directly leading to large power consumption. Hence, the major focus of this dissertation is algorithmic and hardware development of MIMO decoder with reduced complexity for both real and complex domain, which can be a beneficial solution with power efficiency and high throughput. Both hard and soft domain MIMO detectors are considered. The use of lattice reduction (LR) algorithm and on-demand-child-expansion for the reduction of noise propagation and node calculation respectively are the two of the key features of our developed architecture, presented in this literature. The real domain iterative soft MIMO decoding algorithm, simulated for 4 × 4 MIMO with different modulation scheme, achieves 1.1 to 2.7 dB improvement over Lease Sphere Decoder (LSD) and more than 8x reduction in list size, K as well as complexity of the detector. Next, the iterative real domain K-Best decoder is expanded to the complex domain with new detection scheme. It attains 6.9 to 8.0 dB improvement over real domain K-Best decoder and 1.4 to 2.5 dB better performance over conventional complex decoder for 8 × 8 MIMO with 64 QAM modulation scheme. Besides K, a new adjustable parameter, Rlimit has been introduced in order to append re-configurability trading-off between complexity and performance. After that, a novel low-power hardware architecture of complex decoder is developed for 8 × 8 MIMO and 64 QAM modulation scheme. The total word length of only 16 bits has been adopted limiting the bit error rate (BER) degradation to 0.3 dB with K and Rlimit equal to 4. The proposed VLSI architecture is modeled in Verilog HDL using Xilinx and synthesized using Synopsys Design Vision in 45 nm CMOS technology. According to the synthesize result, it achieves 1090.8 Mbps throughput with power consumption of 580 mW and latency of 0.33 us. The maximum frequency the design proposed is 181.8 MHz. All of the proposed decoders mentioned above are bounded by the fixed K. Hence, an adaptive real domain K-Best decoder is further developed to achieve the similar performance with less K, thereby reducing the computational complexity of the decoder. It does not require accurate SNR measurement to perform the initial estimation of list size, K. Instead, the difference between the first two minimal distances is considered, which inherently eliminates complexity. In summary, a novel iterative K-Best detector for both real and complex domain with efficient VLSI design is proposed in this dissertation. The results from extensive simulation and VHDL with analysis using Synopsys tool are also presented for justification and validation of the proposed works

A Robust Low-Complexity MIMO Detector for Rank 4 LTE/LTE-A Systems

This paper deals with MIMO detection for rank 4 LTE systems. The paper revolves around a previously known detector [1, by Inkyu Lee, TCOM'2010] which we shall refer to as RCSMLD (Reduced-Constellation-Size-Maximum-Likelihood-Detector). However, a direct application of the scheme in [1, by Inkyu Lee, TCOM'2010] to LTE/LTE-A rank 4 test cases results in unsatisfactory performance. The first contribution of the paper is to introduce several modifications that can jointly be applied to the basic RCSMLD scheme which, taken together, result in excellent performance. Our second contribution is the development of a highly efficient hardware structure for RCSMLD that allows for an implementation with very few multiplications.Comment: Accepted for publication in PIMRC-2014, Washington DC, US

An Iterative Soft Decision Based LR-Aided MIMO Detector

The demand for wireless and high-rate communication system is increasing gradually and multiple-input-multiple-output (MIMO) is one of the feasible solutions to accommodate the growing demand for its spatial multiplexing and diversity gain. However, with high number of antennas, the computational and hardware complexity of MIMO increases exponentially. This accumulating complexity is a paramount problem in MIMO detection system directly leading to large power consumption. Hence, the major focus of this dissertation is algorithmic and hardware development of MIMO decoder with reduced complexity for both real and complex domain, which can be a beneficial solution with power efficiency and high throughput. Both hard and soft domain MIMO detectors are considered. The use of lattice reduction (LR) algorithm and on-demand-child-expansion for the reduction of noise propagation and node calculation respectively are the two of the key features of our developed architecture, presented in this literature. The real domain iterative soft MIMO decoding algorithm, simulated for 4 × 4 MIMO with different modulation scheme, achieves 1.1 to 2.7 dB improvement over Lease Sphere Decoder (LSD) and more than 8x reduction in list size, K as well as complexity of the detector. Next, the iterative real domain K-Best decoder is expanded to the complex domain with new detection scheme. It attains 6.9 to 8.0 dB improvement over real domain K-Best decoder and 1.4 to 2.5 dB better performance over conventional complex decoder for 8 × 8 MIMO with 64 QAM modulation scheme. Besides K, a new adjustable parameter, Rlimit has been introduced in order to append re-configurability trading-off between complexity and performance. After that, a novel low-power hardware architecture of complex decoder is developed for 8 × 8 MIMO and 64 QAM modulation scheme. The total word length of only 16 bits has been adopted limiting the bit error rate (BER) degradation to 0.3 dB with K and Rlimit equal to 4. The proposed VLSI architecture is modeled in Verilog HDL using Xilinx and synthesized using Synopsys Design Vision in 45 nm CMOS technology. According to the synthesize result, it achieves 1090.8 Mbps throughput with power consumption of 580 mW and latency of 0.33 us. The maximum frequency the design proposed is 181.8 MHz. All of the proposed decoders mentioned above are bounded by the fixed K. Hence, an adaptive real domain K-Best decoder is further developed to achieve the similar performance with less K, thereby reducing the computational complexity of the decoder. It does not require accurate SNR measurement to perform the initial estimation of list size, K. Instead, the difference between the first two minimal distances is considered, which inherently eliminates complexity. In summary, a novel iterative K-Best detector for both real and complex domain with efficient VLSI design is proposed in this dissertation. The results from extensive simulation and VHDL with analysis using Synopsys tool are also presented for justification and validation of the proposed works