Plasmonic and Photonic Designs for Light Trapping in Thin Film Solar Cells

Thin film solar cells are promising to realize cheap solar energy. Compared to conventional wafer cells, they can reduce the use of semiconductor material by 90%. The efficiency of thin film solar cells, however, is limited due to insufficient light absorption. Sufficient light absorption at the bandgap of semiconductor requires a light path more than 10x the thickness of the semiconductor. Advanced designs for light trapping are necessary for solar cells to absorb sufficient light within a limited volume of semiconductor. The goal is to convert the incident light into a trapped mode in the semiconductor layer. In this dissertation, a critical review of currently used methods for light trapping in solar cells is presented. The disadvantage of each design is pointed out including insufficient enhancement, undesired optical loss and undesired loss in carrier transport. The focus of the dissertation is light trapping by plasmonic and photonic structures in thin film Si solar cells. The performance of light trapping by plasmonic structures is dependent on the efficiency of photon radiation from plasmonic structures. The theory of antenna radiation is used to study the radiation by plasmonic structures. In order to achieve efficient photon radiation at a plasmonic resonance, a proper distribution of surface charges is necessary. The planar fishnet structure is proposed as a substitution for plasmonic particles. Large particles are required in order to resonate at the bandgap of semiconductor material. Hence, the resulting overall thickness of solar cells with large particles is large. Instead, the resonance of fishnet structure can be tuned without affecting the overall cell thickness. Numerical simulation shows that the enhancement of light absorption in the active layer is over 10x compared to the same cell without fishnet. Photons radiated from the resonating fishnet structure travel in multiple directions within the semiconductor layer. There is enhanced field localization due to interference. The short circuit current was enhanced by 13.29%. Photonic structures such as nanodomes and gratings are studied. Compared to existing designs, photonic structures studied in this dissertation exhibited further improvements in light absorption and carrier transport. The nanodome geometry was combined with conductive charge collectors in order to perform simultaneous enhancement in optics and carrier transport. Despite the increased volume of semiconductor material, the collection length for carriers is less than the diffusion length for minority carriers. The nanodome geometry can be used in the back end and the front end of solar cells. A blazed grating structure made of transparent conductive oxide serves as the back passivation layer while enhancing light absorption. The surface area of the absorber is increased by only 15%, indicating a limited increase in surface recombination. The resulting short circuit current is enhanced by over 20%. The designs presented in the dissertation have demonstrated enhancement in Si thin film solar cells. The enhancement is achieved without hurting carrier transport in solar cells. As a result, the enhancement in light absorption can efficiently convert to the enhancement in cell efficiency. The fabrication of the proposed designs in this dissertation involves expensive process such as electron beam lithography. Future work is focused on optical designs that are feasible for cheap fabrication process. The designs studied in this dissertation can serve as prototype designs for future work

Mecanismos de transporte en células solares basadas en heterouniones con silicio

Esta tesis doctoral se enmarca dentro de la tecnología fotovoltaica basada en silicio. El silicio es un material semiconductor con unas propiedades y un desarrollo tecnológico tal que le han convertido en el material más importante de la industria fotovoltaica. En la actualidad, las células solares basadas en silicio suponen el 95 % de toda la potencia fotovoltaica instalada en el mundo. De las células solares basadas en silicio, las que han demostrado tener una mayor eficiencia han sido las células de heterounión. El proceso clave por el cual este tipo de estructuras ostentan dicho récord es por lograr una buena pasivación de la superficie del silicio cristalino..

A novel low-temperature growth method of silicon structures and application in flash memory.

Flash memories are solid-state non-volatile memories. They play a vital role especially in information storage in a wide range of consumer electronic devices and applications including smart phones, digital cameras, laptop computers, and satellite navigators. The demand for high density flash has surged as a result of the proliferation of these consumer electronic portable gadgets and the more features they offer – wireless internet, touch screen, video capabilities. The increase in the density of flash memory devices over the years has come as a result of continuous memory cell-size reduction. This size scaling is however approaching a dead end and it is widely agreed that further reduction beyond the 20 nm technological node is going to be very difficult, as it would result to challenges such as cross-talk or cell-to-cell interference, a high statistical variation in the number of stored electrons in the floating gate and high leakage currents due to thinner tunnel oxides. Because of these challenges a wide range of solutions in form of materials and device architectures are being investigated. Among them is three-dimensional (3-D) flash, which is widely acclaimed as the ideal solution, as they promise the integration of long-time retention and ultra-high density cells without compromising device reliability. However, current high temperature (>600 °C) growth techniques of the Polycrystalline silicon floating gate material are incompatible with 3-D flash memory; with vertically stacked memory layers, which require process temperatures to be ≤ 400 °C. There already exist some low temperature techniques for producing polycrystalline silicon such as laser annealing, solid-phase crystallization of amorphous silicon and metal-induced crystallization. However, these have some short-comings which make them not suitable for use in 3-D flash memory, e.g. the high furnace annealing temperatures (700 °C) in solid-phase crystallization of amorphous silicon which could potentially damage underlying memory layers in 3-D flash, and the metal contaminants in metal-induced crystallization which is a potential source of high leakage currents. There is therefore a need for alternative low temperature techniques that would be most suitable for flash memory purposes. With reference to the above, the main objective of this research was to develop a novel low temperature method for growing silicon structures at ≤ 400 °C. This thesis thus describes the development of a low-temperature method for polycrystalline silicon growth and the application of the technique in a capacitor-like flash memory device. It has been demonstrated that silicon structures with polycrystalline silicon-like properties can be grown at ≤ 400 °C in a 13.56 MHz radio frequency (RF) plasma-enhanced chemical vapour deposition (PECVD) reactor with the aid of Nickel Formate Dihydrate (NFD). It is also shown that the NFD coated on the substrates, thermally decomposes in-situ during the deposition process forming Ni particles that act as nucleation and growth sites of polycrystalline silicon. Silicon films grown by this technique and without annealing, have exhibited optical band gaps of ~ 1.2 eV compared to 1.78 eV for films grown under identical conditions but without the substrate being coated. These values were determined from UV-Vis spectroscopy and Tauc plots. These optical band gaps correspond to polycrystalline silicon and amorphous silicon respectively, meaning that the films grown on NFD-coated substrates are polycrystalline silicon while those grown on uncoated substrates remain amorphous. Moreover, this novel technique has been used to fabricate a capacitor-like flash memory that has exhibited hysteresis width corresponding to charge storage density in the order of 1012 cm-2 with a retention time well above 20 days for a device with silicon films grown at 300 °C. Films grown on uncoated films have not exhibit any significant hysteresis, and thus no flash memory-like behaviour. Given that all process temperatures throughout the fabrication of the devices are less than 400 °C and that no annealing of any sort was done on the material and devices, this growth method is thermal budget efficient and meets the crucial process temperature requirements of 3-D flash memory. Furthermore, the technique is glass compatible, which could prove a major step towards the acquisition of flash memory-integrated systems on glass, as well as other applications requiring low temperature polycrystalline silicon