Ultra-Low Power Circuit Design for Miniaturized IoT Platform

This thesis examines the ultra-low power circuit techniques for mm-scale Internet of Things (IoT) platforms. The IoT devices are known for their small form factors and limited battery capacity and lifespan. So, ultra-low power consumption of always-on blocks is required for the IoT devices that adopt aggressive duty-cycling for high power efficiency and long lifespan. Several problems need to be addressed regarding IoT device designs, such as ultra-low power circuit design techniques for sleep mode and energy-efficient and fast data rate transmission for active mode communication. Therefore, this thesis highlights the ultra-low power always-on systems, focusing on energy efficient optical transmission in order to miniaturize the IoT systems. First, this thesis presents a battery-less sub-nW micro-controller for an always-operating system implemented with a newly proposed logic family. Second, it proposes an always-operating sub-nW light-to-digital converter to measure instant light intensity and cumulative light exposure, which employs the characteristics of this proposed logic family. Third, it presents an ultra-low standby power optical wake-up receiver with ambient light canceling using dual-mode operation. Finally, an energy-efficient low power optical transmitter for an implantable IoT device is suggested. Implications for future research are also provided.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/145862/1/imhotep_1.pd

Ultra-Low Power Circuit Design for Cubic-Millimeter Wireless Sensor Platform.

Modern daily life is surrounded by smaller and smaller computing devices. As Bell’s Law predicts, the research community is now looking at tiny computing platforms and mm3-scale sensor systems are drawing an increasing amount of attention since they can create a whole new computing environment. Designing mm3-scale sensor nodes raises various circuit and system level challenges and we have addressed and proposed novel solutions for many of these challenges to create the first complete 1.0mm3 sensor system including a commercial microprocessor. We demonstrate a 1.0mm3 form factor sensor whose modular die-stacked structure allows maximum volume utilization. Low power I2C communication enables inter-layer serial communication without losing compatibility to standard I2C communication protocol. A dual microprocessor enables concurrent computation for the sensor node control and measurement data processing. A multi-modal power management unit allowed energy harvesting from various harvesting sources. An optical communication scheme is provided for initial programming, synchronization and re-programming after recovery from battery discharge. Standby power reduction techniques are investigated and a super cut-off power gating scheme with an ultra-low power charge pump reduces the standby power of logic circuits by 2-19× and memory by 30%. Different approaches for designing low-power memory for mm3-scale sensor nodes are also presented in this work. A dual threshold voltage gain cell eDRAM design achieves the lowest eDRAM retention power and a 7T SRAM design based on hetero-junction tunneling transistors reduces the standby power of SRAM by 9-19× with only 15% area overhead. We have paid special attention to the timer for the mm3-scale sensor systems and propose a multi-stage gate-leakage-based timer to limit the standard deviation of the error in hourly measurement to 196ms and a temperature compensation scheme reduces temperature dependency to 31ppm/°C. These techniques for designing ultra-low power circuits for a mm3-scale sensor enable implementation of a 1.0mm3 sensor node, which can be used as a skeleton for future micro-sensor systems in variety of applications. These microsystems imply the continuation of the Bell’s Law, which also predicts the massive deployment of mm3-scale computing systems and emergence of even smaller and more powerful computing systems in the near future.Ph.D.Electrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/91438/1/sori_1.pd

Low-power circuit design using adiabatic and asynchronous techniques.

So Pui Tak.Thesis (M.Phil.)--Chinese University of Hong Kong, 2005.Includes bibliographical references.Abstracts in English and Chinese.Abstract --- p.iiAcknowledgement --- p.vTable of Contents --- p.viList of Figures --- p.ixList of Tables --- p.xiiChapter Chapter 1 --- Introduction --- p.11Chapter 1.1 --- Overview --- p.1-1Chapter 1.1 --- Power Consumption in Conventional CMOS circuit --- p.1-1Chapter 1.2 --- Power Consumption in Synchronous Circuit --- p.1-6Chapter 1.4 --- Objectives --- p.1-7Chapter 1.5 --- Thesis Outline --- p.1-8Chapter Chapter 2 --- Background Theory --- p.2-1Chapter 2.1 --- Introduction --- p.2-1Chapter 2.2 --- Definition of Adiabatic Principle --- p.2-1Chapter 2.3 --- Overview of Adiabatic Circuit --- p.2-3Chapter 2.4 --- Asynchro nous Circuits --- p.2-7Chapter Chapter 3 --- Adiabatic Circuit usingRVS --- p.3-1Chapter 3.1 --- Introduction --- p.3-1Chapter 3.2 --- Architecture --- p.3-2Chapter 3.3 --- Ramp Voltage Supply Generator --- p.3-4Chapter 3.4 --- Circuit Evaluation --- p.3-7Chapter 3.5 --- Simulation Results --- p.3-8Chapter 3.4 --- Experimental Results --- p.3-9Chapter Chapter 4 --- Asynchronous Circuit Technique --- p.4-1Chapter 4.1 --- Introduction --- p.4-1Chapter 4.2 --- Architecture --- p.4-1Chapter 4.2.1 --- Muller Distributor Block Design --- p.4-2Chapter 4.2.2 --- Delay Block Design --- p.4-4Chapter Chapter 5 --- Adiabatic -Asynchronous Multiplier --- p.5-1Chapter 5.1 --- Introduction --- p.5-1Chapter 5.2 --- Combination of Adiabatic and Asynchronous Techniques. --- p.5-1Chapter 5.3 --- Oscillator Block Design --- p.5-3Chapter 5.4 --- Multiplier Architecture --- p.5-6Chapter Chapter 6 --- Layout Consideration --- p.6-1Chapter 6.1 --- Introduction --- p.6-1Chapter 6.2 --- Floorplanning --- p.6-1Chapter 6.3 --- Routing Channels --- p.6-2Chapter 6.3 --- Power Supply --- p.6-4Chapter 6.4 --- Input Protection Circuitry --- p.6-5Chapter 6.5 --- Die Micrographs of the Chip --- p.6-7Chapter Chapter 7 --- Simulation Results --- p.7-1Chapter 7.1 --- Introduction --- p.7-1Chapter 7.2 --- Muller Distributor Control Signal --- p.7-1Chapter 7.3 --- Power Consumption --- p.7-6Chapter 7.3.1 --- Synchronous Multiplier --- p.7-6Chapter 7.3.2 --- AAT Multiplier --- p.7-7Chapter 7.3.3 --- Power Comparison --- p.7-8Chapter Chapter 8 --- Measurement Results --- p.8-1Chapter 8.1 --- Introduction --- p.8-1Chapter 8.2 --- Experimental Setup --- p.8-2Chapter 8.3 --- Measurement Results --- p.8-6Chapter Chapter 9 --- Conclusion --- p.9-1Chapter 9.1 --- Contributions --- p.9-1Chapter Chapter 10 --- Bibliography --- p.10-1Appendix I Building Blocks --- p.1Appendix II Simulated Waveform --- p.7Appendix III Measured Waveform --- p.8Appendix IV Pin List --- p.

Variation Resilient Adaptive Controller for Subthreshold Circuits

Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for power-limited applications. For this design technique to gain widespread adoption, one of the most pressing concerns is how to improve the robustness of subthreshold logic to process and temperature variations. We propose a variation resilient adaptive controller for subthreshold circuits with the following novel features: new sensor based on time-to-digital converter for capturing the variations accurately as digital signatures, and an all-digital DC-DC converter incorporating the sensor capable of generating an operating operating Vdd from 0V to 1.2V with a resolution of 18.75mV, suitable for subthreshold circuit operation. The benefits of the proposed controller is reflected with energy improvement of up to 55% compared to when no controller is employed. The detailed implementation and validation of the proposed controller is discussed

Low Power Circuit Design in Sustainable Self Powered Systems for IoT Applications

The Internet-of-Things (IoT) network is being vigorously pushed forward from many fronts in diverse research communities. Many problems are still there to be solved, and challenges are found among its many levels of abstraction. In this thesis we give an overview of recent developments in circuit design for ultra-low power transceivers and energy harvesting management units for the IoT. The first part of the dissertation conducts a study of energy harvesting interfaces and optimizing power extraction, followed by power management for energy storage and supply regulation. we give an overview of the recent developments in circuit design for ultra-low power management units, focusing mainly in the architectures and techniques required for energy harvesting from multiple heterogeneous sources. Three projects are presented in this area to reach a solution that provides reliable continuous operation for IoT sensor nodes in the presence of one or more natural energy sources to harvest from. The second part focuses on wireless transmission, To reduce the power consumption and boost the Tx energy efficiency, a novel delay cell exploiting current reuse is used in a ring-oscillator employed as the local oscillator generator scheme. In combination with an edge-combiner power amplifier, the Tx showed a measured energy efficiency of 0.2 nJ=bit and a normalized energy efficiency of 3.1 nJ=bit:mW when operating at output power levels up to -10 dBm and data rates of 3 Mbps

Students’ acceptance towards kahoot application in mastering culinary terminology

Kahoot! is a game-based learning platform used to review students’ knowledge, for formative assessment and provides an opportunity not only to assess students' conceptual understanding but also to build new knowledge through further clarification during or after the game. The objective of this study is to assess the acceptability of culinary students in the use of Kahoot! application for mastery the culinary terminology. This study aimed to identify students' acceptance of learning applications, to identify students' acceptance of Kahoot! use in terms of memory as well as students' level of mastering Kahoot! in the learning process. This study is a descriptive study that used a five-point Likert scale questionnaire as an instrument. A total of 48 second year students from the Catering program were used as the study sample. The collected data were analyzed using Statistical Package for Social Science Version 23.0 for Windows (SPSS). The results show that the aspect of students' level of mastering the culinary terminology using Kahoot! application is high with a mean score of 4.55. Whereas the students’ acceptance of Kahoot! as a learning application, was also high with a mean score of 4.44. Finally, the students’ acceptance of the culinary terminology tested using Kahoot! is high with a mean score of 4.45