190,436 research outputs found
Preprint arXiv: 220911058 Submitted on 22 Sep 2022
Circuit design for quantum machine learning remains a formidable challenge. Inspired by the applications of tensor networks across different fields and their novel presence in the classical machine learning context, one proposed method to design variational circuits is to base the circuit architecture on tensor networks. Here, we comprehensively describe tensor-network quantum circuits and how to implement them in simulations. This includes leveraging circuit cutting, a technique used to evaluate circuits with more qubits than those available on current quantum devices. We then illustrate the computational requirements and possible applications by simulating various tensor-network quantum circuits with PennyLane, an open-source python library for differential programming of quantum computers. Finally, we demonstrate how to apply these circuits to increasingly complex image processing tasks, completing this overview of a flexible method to design circuits that can be applied to industrially-relevant machine learning tasks
A practical overview of image classification with variational tensor-network quantum circuits
Circuit design for quantum machine learning remains a formidable challenge.
Inspired by the applications of tensor networks across different fields and
their novel presence in the classical machine learning context, one proposed
method to design variational circuits is to base the circuit architecture on
tensor networks. Here, we comprehensively describe tensor-network quantum
circuits and how to implement them in simulations. This includes leveraging
circuit cutting, a technique used to evaluate circuits with more qubits than
those available on current quantum devices. We then illustrate the
computational requirements and possible applications by simulating various
tensor-network quantum circuits with PennyLane, an open-source python library
for differential programming of quantum computers. Finally, we demonstrate how
to apply these circuits to increasingly complex image processing tasks,
completing this overview of a flexible method to design circuits that can be
applied to industrially-relevant machine learning tasks
A Compact CMOS Memristor Emulator Circuit and its Applications
Conceptual memristors have recently gathered wider interest due to their
diverse application in non-von Neumann computing, machine learning,
neuromorphic computing, and chaotic circuits. We introduce a compact CMOS
circuit that emulates idealized memristor characteristics and can bridge the
gap between concepts to chip-scale realization by transcending device
challenges. The CMOS memristor circuit embodies a two-terminal variable
resistor whose resistance is controlled by the voltage applied across its
terminals. The memristor 'state' is held in a capacitor that controls the
resistor value. This work presents the design and simulation of the memristor
emulation circuit, and applies it to a memcomputing application of maze solving
using analog parallelism. Furthermore, the memristor emulator circuit can be
designed and fabricated using standard commercial CMOS technologies and opens
doors to interesting applications in neuromorphic and machine learning
circuits.Comment: Submitted to International Symposium of Circuits and Systems (ISCAS)
201
autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components
Approximate computing is an emerging paradigm for developing highly
energy-efficient computing systems such as various accelerators. In the
literature, many libraries of elementary approximate circuits have already been
proposed to simplify the design process of approximate accelerators. Because
these libraries contain from tens to thousands of approximate implementations
for a single arithmetic operation it is intractable to find an optimal
combination of approximate circuits in the library even for an application
consisting of a few operations. An open problem is "how to effectively combine
circuits from these libraries to construct complex approximate accelerators".
This paper proposes a novel methodology for searching, selecting and combining
the most suitable approximate circuits from a set of available libraries to
generate an approximate accelerator for a given application. To enable fast
design space generation and exploration, the methodology utilizes machine
learning techniques to create computational models estimating the overall
quality of processing and hardware cost without performing full synthesis at
the accelerator level. Using the methodology, we construct hundreds of
approximate accelerators (for a Sobel edge detector) showing different but
relevant tradeoffs between the quality of processing and hardware cost and
identify a corresponding Pareto-frontier. Furthermore, when searching for
approximate implementations of a generic Gaussian filter consisting of 17
arithmetic operations, the proposed approach allows us to identify
approximately highly important implementations from possible
solutions in a few hours, while the exhaustive search would take four months on
a high-end processor.Comment: Accepted for publication at the Design Automation Conference 2019
(DAC'19), Las Vegas, Nevada, US
GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning
Automatic transistor sizing is a challenging problem in circuit design due to
the large design space, complex performance trade-offs, and fast technological
advancements. Although there has been plenty of work on transistor sizing
targeting on one circuit, limited research has been done on transferring the
knowledge from one circuit to another to reduce the re-design overhead. In this
paper, we present GCN-RL Circuit Designer, leveraging reinforcement learning
(RL) to transfer the knowledge between different technology nodes and
topologies. Moreover, inspired by the simple fact that circuit is a graph, we
learn on the circuit topology representation with graph convolutional neural
networks (GCN). The GCN-RL agent extracts features of the topology graph whose
vertices are transistors, edges are wires. Our learning-based optimization
consistently achieves the highest Figures of Merit (FoM) on four different
circuits compared with conventional black-box optimization methods (Bayesian
Optimization, Evolutionary Algorithms), random search, and human expert
designs. Experiments on transfer learning between five technology nodes and two
circuit topologies demonstrate that RL with transfer learning can achieve much
higher FoMs than methods without knowledge transfer. Our transferable
optimization method makes transistor sizing and design porting more effective
and efficient.Comment: Accepted to the 57th Design Automation Conference (DAC 2020); 6
pages, 8 figure
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When teaching electro-pneumatic circuits in the automation control class for a distance-learning program, one of the main issues is how to provide hands-on experience for students. In most cases, they can only use simulation design software and watch videos solving laboratory problems without access to the actual equipment. In this paper, the authors developed an electrical wiring software and assembly platform which can help students enhance their hands-on experience when taking the course online. Results show that the performance between on-campus students and distance-learning (DL) students are very similar.Cockrell School of Engineerin
Integration of a wireless sensor network project for introductory circuits and systems teaching
This paper presents an integration of a wireless sensor network design project in an introductory course about circuits and systems. In the project, students will design a wireless sensor network that constitutes of sensors, for a creative surveillance application. Through a versatile project vehicle, project-oriented learning modules, a comprehensive assessment strategy and public learning communities, students can learn contemporary concepts of circuits and systems from the system perspective, as well as develop ability to design a basic electronic system. © 2013 IEEE.published_or_final_versio
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