An audio processing pipeline for acquiring diagnostic quality heart sounds via mobile phone

Recently, heart sound signals captured using mobile phones have been employed to develop data-driven heart disease detection systems. Such signals are generally captured in person by trained clinicians who can determine if the recorded heart sounds are of diagnosable quality. However, mobile phones have the potential to support heart health diagnostics, even where access to trained medical professionals is limited. To adopt mobile phones as self-diagnostic tools for the masses, we would need to have a mechanism to automatically establish that heart sounds recorded by non-expert users in uncontrolled conditions have the required quality for diagnostic purposes. This paper proposes a quality assessment and enhancement pipeline for heart sounds captured using mobile phones. The pipeline analyzes a heart sound and determines if it has the required quality for diagnostic tasks. Also, in cases where the quality of the captured signal is below the required threshold, the pipeline can improve the quality by applying quality enhancement algorithms. Using this pipeline, we can also provide feedback to users regarding the cause of low-quality signal capture and guide them towards a successful one. We conducted a survey of a group of thirteen clinicians with auscultation skills and experience. The results of this survey were used to inform and validate the proposed quality assessment and enhancement pipeline. We observed a high level of agreement between the survey results and fundamental design decisions within the proposed pipeline. Also, the results indicate that the proposed pipeline can reduce our dependency on trained clinicians for capture of diagnosable heart sounds

Autonomous Recovery Of Reconfigurable Logic Devices Using Priority Escalation Of Slack

Field Programmable Gate Array (FPGA) devices offer a suitable platform for survivable hardware architectures in mission-critical systems. In this dissertation, active dynamic redundancy-based fault-handling techniques are proposed which exploit the dynamic partial reconfiguration capability of SRAM-based FPGAs. Self-adaptation is realized by employing reconfiguration in detection, diagnosis, and recovery phases. To extend these concepts to semiconductor aging and process variation in the deep submicron era, resilient adaptable processing systems are sought to maintain quality and throughput requirements despite the vulnerabilities of the underlying computational devices. A new approach to autonomous fault-handling which addresses these goals is developed using only a uniplex hardware arrangement. It operates by observing a health metric to achieve Fault Demotion using Recon- figurable Slack (FaDReS). Here an autonomous fault isolation scheme is employed which neither requires test vectors nor suspends the computational throughput, but instead observes the value of a health metric based on runtime input. The deterministic flow of the fault isolation scheme guarantees success in a bounded number of reconfigurations of the FPGA fabric. FaDReS is then extended to the Priority Using Resource Escalation (PURE) online redundancy scheme which considers fault-isolation latency and throughput trade-offs under a dynamic spare arrangement. While deep-submicron designs introduce new challenges, use of adaptive techniques are seen to provide several promising avenues for improving resilience. The scheme developed is demonstrated by hardware design of various signal processing circuits and their implementation on a Xilinx Virtex-4 FPGA device. These include a Discrete Cosine Transform (DCT) core, Motion Estimation (ME) engine, Finite Impulse Response (FIR) Filter, Support Vector Machine (SVM), and Advanced Encryption Standard (AES) blocks in addition to MCNC benchmark circuits. A iii significant reduction in power consumption is achieved ranging from 83% for low motion-activity scenes to 12.5% for high motion activity video scenes in a novel ME engine configuration. For a typical benchmark video sequence, PURE is shown to maintain a PSNR baseline near 32dB. The diagnosability, reconfiguration latency, and resource overhead of each approach is analyzed. Compared to previous alternatives, PURE maintains a PSNR within a difference of 4.02dB to 6.67dB from the fault-free baseline by escalating healthy resources to higher-priority signal processing functions. The results indicate the benefits of priority-aware resiliency over conventional redundancy approaches in terms of fault-recovery, power consumption, and resource-area requirements. Together, these provide a broad range of strategies to achieve autonomous recovery of reconfigurable logic devices under a variety of constraints, operating conditions, and optimization criteria

実行時ログから対応するソースコード箇所を推測するモバイルアプリケーションの開発支援手法

13301甲第4405号博士（工学）金沢大学博士論文本文Full 以下に掲載予定：IPSJ Transactions on Programming 9(2) pp.1-11 2016. オンライン出版. 共著者：Yuki Ono, Kouhei Sakurai, Satoshi Yaman

Understanding Solidity Event Logging Practices in the Wild

Writing logging messages is a well-established conventional programming practice, and it is of vital importance for a wide variety of software development activities. The logging mechanism in Solidity programming is enabled by the high-level event feature, but up to now there lacks study for understanding Solidity event logging practices in the wild. To fill this gap, we in this paper provide the first quantitative characteristic study of the current Solidity event logging practices using 2,915 popular Solidity projects hosted on GitHub. The study methodically explores the pervasiveness of event logging, the goodness of current event logging practices, and in particular the reasons for event logging code evolution, and delivers 8 original and important findings. The findings notably include the existence of a large percentage of independent event logging code modifications, and the underlying reasons for different categories of independent event logging code modifications are diverse (for instance, bug fixing and gas saving). We additionally give the implications of our findings, and these implications can enlighten developers, researchers, tool builders, and language designers to improve the event logging practices. To illustrate the potential benefits of our study, we develop a proof-of-concept checker on top of one of our findings and the checker effectively detects problematic event logging code that consumes extra gas in 35 popular GitHub projects and 9 project owners have already confirmed the detected issues.Comment: Accepted by 31st ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering (ESEC/FSE'23