Effects of Thermal Boundary Resistance on Thermal Management of Gallium-Nitride-Based Semiconductor Devices: A Review

Wide-bandgap gallium nitride (GaN)-based semiconductors offer significant advantages over traditional Si-based semiconductors in terms of high-power and high-frequency operations. As it has superior properties, such as high operating temperatures, high-frequency operation, high breakdown electric field, and enhanced radiation resistance, GaN is applied in various fields, such as power electronic devices, renewable energy systems, light-emitting diodes, and radio frequency (RF) electronic devices. For example, GaN-based high-electron-mobility transistors (HEMTs) are used widely in various applications, such as 5G cellular networks, satellite communication, and radar systems. When a current flows through the transistor channels during operation, the self-heating effect (SHE) deriving from joule heat generation causes a significant increase in the temperature. Increases in the channel temperature reduce the carrier mobility and cause a shift in the threshold voltage, resulting in significant performance degradation. Moreover, temperature increases cause substantial lifetime reductions. Accordingly, GaN-based HEMTs are operated at a low power, although they have demonstrated high RF output power potential. The SHE is expected to be even more important in future advanced technology designs, such as gate-all-around field-effect transistor (GAAFET) and three-dimensional (3D) IC architectures. Materials with high thermal conductivities, such as silicon carbide (SiC) and diamond, are good candidates as substrates for heat dissipation in GaN-based semiconductors. However, the thermal boundary resistance (TBR) of the GaN/substrate interface is a bottleneck for heat dissipation. This bottleneck should be reduced optimally to enable full employment of the high thermal conductivity of the substrates. Here, we comprehensively review the experimental and simulation studies that report TBRs in GaN-on-SiC and GaN-on-diamond devices. The effects of the growth methods, growth conditions, integration methods, and interlayer structures on the TBR are summarized. This study provides guidelines for decreasing the TBR for thermal management in the design and implementation of GaN-based semiconductor devices

An Enhanced Statistical Phonon Transport Model for Nanoscale Thermal Transport and Design

Managing thermal energy generation and transfer within the nanoscale devices (transistors) of modern microelectronics is important as it limits speed, carrier mobility, and affects reliability. Application of Fourier’s Law of Heat Conduction to the small length and times scales associated with transistor geometries and switching frequencies doesn’t give accurate results due to the breakdown of the continuum assumption and the assumption of local thermodynamic equilibrium. Heat conduction at these length and time scales occurs via phonon transport, including both classical and quantum effects. Traditional methods for phonon transport modeling are lacking in the combination of computational efficiency, physical accuracy, and flexibility. The Statistical Phonon Transport Model (SPTM) is an engineering design tool for predicting non-equilibrium phonon transport. The goal of this work has been to enhance the models and computational algorithms of the SPTM to elevate it to have a high combination of accuracy and flexibility. Four physical models of the SPTM were enhanced. The lattice dynamics calculation of phonon dispersion relations was extended to use first and second nearest neighbor interactions, based on published interatomic force constants computed with first principles Density Functional Theory (DFT). The computation of three phonon scattering partners (that explicitly conserve energy and momentum) with the inclusion of the three optical phonon branches was applied using scattering rates computed from Fermi’s Golden Rule. The prediction of phonon drift was extended to three dimensions within the framework of the previously established methods of the SPTM. Joule heating as a result of electron-phonon scattering in nanoscale electronic devices was represented using a modal specific phonon source that can be varied in space and time. Results indicate the use of first and second nearest neighbor lattice dynamics better predicted dispersion when compared to experimental results and resulted in a higher fidelity representation of phonon group velocities and three phonon scattering partners in an anisotropic manner. Three phonon scattering improvements resulted in enhanced fidelity in the prediction of phonon modal decay rates across the wavevector space and thus better representation of non-equilibrium behavior. Comparisons to the range of phonon transport modeling approaches from literature verify that the SPTM has higher phonon fidelity than Boltzmann Transport Equation and Monte Carlo and higher length scale and time scale fidelity than Direct Atomic Simulation. Additional application of the SPTM to both a 1-d silicon nanowire transistor and a 3-d FinFET array transistor in a transient manner illustrate the design capabilities. Thus, the SPTM has been elevated to fill the gap between lower phonon fidelity Monte Carol (MC) models and high fidelity, inflexible direct quantum simulations (or Direct Atomic Simulations (DAS)) within the field of phonon transport modeling for nanoscale electronic devices. The SPTM has produced high fidelity device level non-equilibrium phonon information in a 3-d, transient manner where Joule heating occurs. This information is required due to the fact that effective lattice temperatures are not adequate to describe the local thermal conditions. Knowledge of local phonon distributions, which can’t be determined from application of Fourier’s law, is important because of effects on electron mobility, device speed, leakage, and reliability