52 research outputs found

    Higher-order CIS codes

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    We introduce {\bf complementary information set codes} of higher-order. A binary linear code of length tktk and dimension kk is called a complementary information set code of order tt (tt-CIS code for short) if it has tt pairwise disjoint information sets. The duals of such codes permit to reduce the cost of masking cryptographic algorithms against side-channel attacks. As in the case of codes for error correction, given the length and the dimension of a tt-CIS code, we look for the highest possible minimum distance. In this paper, this new class of codes is investigated. The existence of good long CIS codes of order 33 is derived by a counting argument. General constructions based on cyclic and quasi-cyclic codes and on the building up construction are given. A formula similar to a mass formula is given. A classification of 3-CIS codes of length ≤12\le 12 is given. Nonlinear codes better than linear codes are derived by taking binary images of Z4\Z_4-codes. A general algorithm based on Edmonds' basis packing algorithm from matroid theory is developed with the following property: given a binary linear code of rate 1/t1/t it either provides tt disjoint information sets or proves that the code is not tt-CIS. Using this algorithm, all optimal or best known [tk,k][tk, k] codes where t=3,4,…,256t=3, 4, \dots, 256 and 1≤k≤⌊256/t⌋1 \le k \le \lfloor 256/t \rfloor are shown to be tt-CIS for all such kk and tt, except for t=3t=3 with k=44k=44 and t=4t=4 with k=37k=37.Comment: 13 pages; 1 figur

    Higher-Order Glitches Free Implementation of the AES using Secure Multi-Party Computation Protocols - Extended Version

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    Higher-order side channel attacks (HO-SCA) is a powerful technique against cryptographic implementations and the design of appropriate countermeasures is nowadays an important topic. In parallel, another class of attacks, called glitches attacks, have been investigated which exploit the hardware glitches phenomena occurring during the physical execution of algorithms. Some solutions have been proposed to counteract HO-SCA at any order or to defeat glitches attacks, but no work has until now focussed on the definition of a sound countermeasure thwarting both attacks. We introduce in this paper a circuit model in which side-channel resistance in presence of glitches effects can be characterized. This allows us to construct the first glitches free HO-SCA countermeasure. The new construction can be built from any Secure Multi-Party Computation protocol and, as an illustration, we propose to apply the protocol introduced by Ben-Or et al. at STOC in 1988. The adaptation of the latter protocol to the context of side-channel analysis results in a completely new higher-order masking scheme, particularly interesting when addressing resistance in the presence of glitches. An application of our scheme to the AES block cipher is detailed, as well as an information theoretic evaluation of the new masking function that we call polynomial masking

    Towards Security Limits in Side-Channel Attacks

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    This paper considers a recently introduced framework for the analysis of physically observable cryptographic devices. It exploits a model of computation that allows quantifying the effect of practically relevant leakage functions with a combination of security and information theoretic metrics. As a result of these metrics, a unified evaluation methodology for side-channel attacks was derived that we illustrate by applying it to an exemplary block cipher implementation. We first consider a Hamming weight leakage function and evaluate the efficiency of two commonly investigated countermeasures, namely noise addition and masking. Then, we show that the proposed methodology allows capturing certain non-trivial intuitions about the respective effectiveness of these countermeasures Finally, we justify the need of combined metrics for the evaluation, comparison and understanding of side-channel attacks

    Revisiting a Masked Lookup-Table Compression Scheme

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    Lookup-table based side-channel countermeasure is the prime choice for masked S-box software implementations at very low orders. To mask an nn-bit to mm-bit S-box at first- and second- orders, one requires a temporary table in RAM of size m2nm 2^n bits. Recently, Vadnala (CT-RSA 2017) suggested masked table compression schemes at first- and second-orders to reduce the table size by (approximately) a factor of 2l2^l, where ll is a parameter. Though greater compression results in a greater execution time, these proposals would still be attractive for highly resource constrained devices. In this work, we contradict the second-order security claim of the second-order table compression scheme by Vadnala. We do this by exhibiting several pairs of intermediate variables that jointly depend on the bits of the secret. Motivated by the fact that randomness is also a costly resource for highly resource constrained devices, we then propose a variant of the first-order table compression scheme of Vadnala that has the new randomness complexity of about ll instead of 2l2^l for the original proposal. We achieve this without inducing any noticeable difference in the overall execution time or memory requirement of the original scheme. Finally, we show that the randomness complexity of ll is optimal in an algebraic sense

    Combined Attacks on the AES Key Schedule

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    We present new combined attacks on the AES key schedule based on the work of Roche et al. The main drawbacks of the original attack are: the need for high repeatability of the fault, a very particular fault model and a very high complexity of the key recovery algorithm. We consider more practical fault models, we obtain improved key recovery algorithms and we present more attack paths for combined attacks on AES. We propose to inject faults on the different operations of the key schedule instead of the key state of round 9 or the corresponding data state. We also consider fault injections in AES constants such as the RCON or the affine transformation of the SubWord. By corrupting these constants, the attacker can easily deduce the value of the error. The key recovery complexity can then be greatly improved. Notably, we can obtain a complexity identical to a classical differential side-channel attack. Our attacks defeat most AES implementations secure against both high-order side-channel attacks and fault attacks
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