Amorphous Silicon Based Large Area Detector for Protein Crystallography

Proteins are commonly found molecules in biological systems: our fingernails, hair, skin, blood, muscle, and eyes are all made of protein. Many diseases simply arise because a protein is not folded properly. Therefore, knowledge of protein structure is considered a prerequisite to understanding protein function and, by extension, a cornerstone for drug design and for the development of therapeutic agents. Protein crystallography is a tool that allows structural biologists to discern protein structures to the highest degree of detail possible in three dimensions. The recording of x-ray diffraction data from the protein crystal is a central part of protein crystallography. As such, an important challenge in protein crystallography research is to design x-ray detectors to accurately determine the structures of proteins. This research presents the design and evaluation of a solid-state large area at panel detector for protein crystallography based on an amorphous selenium (a-Se) x-ray sensitive photoconductor operating in avalanche mode integrated with an amorphous silicon (a-Si:H) charge storage and readout pixel. The advantages of the proposed detector over the existing imaging plate (IP) and charge coupled device (CCD) detectors are large area, high dynamic range coupled to single x-ray detection capability, fast readout, high spatial resolution, and inexpensive manufacturing process. The requirement of high dynamic range is crucial for protein crystallography since both weak and strong diffraction spots need to be imaged. The main disadvantage of a-Si:H thin film transistor (TFT) array is its high electronic noise which prohibits quantum noise limited operation for the weak diffraction spots. To overcome the problem, the x-ray to charge conversion gain of a-Se is increased by using its internal avalanche multiplication gain. Since the detector can be made approximately the same size as the diffraction pattern, it eliminates the need for image demagnification. The readout time of the detector is usually within the ms range, so it is appropriate for crystallographic application. The optimal detector parameters (such as, detector size, pixel size, thickness of a-Se layer), and operating parameters (such as, electric field across the a-Se layer) are determined based on the requirements for protein crystallography. A complete model of detective quantum efficiency (DQE) of the detector is developed to predict and optimize the performance of the detector. The performance of the detector is evaluated in terms of readout time (< 1 s), dynamic range (~10^5), and sensitivity (~ 1 x-ray photon), thus validating the detector's efficacy for protein crystallography. The design of an in-house a-Si:H TFT pixel array for integration with an avalanche a-Se layer is detailed. Results obtained using single pixel are promising and highlight the feasibility of a-Si:H pixels coupled with avalanche a-Se layer for protein crystallography application

High voltage metal oxide thin film transistors to drive arrays of dielectric elastomer actuators

This thesis advances the field of high-voltage thin film transistors (HVTFTs) and dielectric elastomer actuators (DEAs) by demonstrating a strategy for low-voltage addressing of an array of high voltage soft actuators suspended on a flexible substrate. First, I present the first HVTFTs operating at 1 kV drain-source voltage, switching with an on-off ratio of 20 at 80 V gate-source voltage. The HVTFTs can operate at high voltage thanks to geometrical features increasing the breakdown voltage: a thick gate dielectric composed of a bilayer of alumina (100 nm) and Parylene-C (1 um), a long semiconducting channel (500 um), and a 150 &mlong non-gated region between the drain and the gate electrode called the offset gate. The use of an amorphous oxide semiconductor (AOS), zinc tin oxide (ZTO), enables a high on-currents of 0.1 mA. The ZTO was synthesized by a sol-gel process after spin-coating on a flexible polyimide substrate, previously passivated with alumina. I optimized the HVTFT switching properties by doping the ZTO layer with yttrium (5%). It improved the on-off ratio up to 1000 at 500 V operation voltage by decreasing the leakage current down to 100 nA. Then, I show the first integration of HVTFTs with DEAs. My ZTO HVTFTs switch DEAs on and off with only 30 V gate voltage under a bias voltage of 1.4 kV. The system time response in 50 ms. The demonstrator is a 4x4 array of diaphragm DEAs. A layer of 4x4 DEAs is suspended over a layer of 4x4 HVTFTs built on flexible polyimide. The DEAs and the HVTFTs were interconnected thanks to a flexible PCB in a resistive load inverter circuit architecture. A flexible 3D printed chamber was constantly biasing the DEA diaphragms with a back-pressure. The DEAs were made of PDMS and the active region is defined by overlapping carbon-PDMS electrodes. The device operates down to a 5mm radius of curvature. Finally, I demonstrate latching of the HVTFT and the DEA by using triboelectric sensors. Under a constant 500 V circuit bias, the control of the HVTFT gate with triboelectric generators enabled 4s latching of the inverter output voltage at 470 V for the off-state and at 120 V for the on-state. The latching of the DEAs with the HVTFT circuit finally proves that this approach can lead to a bistable control of DEAs. This PhD thesis results show that my HVTFTs are versatile components usable not only to address DEAs but also to interface low voltage sensors with high voltage actuators