2,018 research outputs found

    Developing the knowledge-based human resources that support the implementation of the National Dual Training System (NDTS): evaluation of TVET teacher's competency at MARA Training Institutions

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    Development in the world of technical and vocational education and training (TVET) on an ongoing basis is a challenge to the profession of the TVET-teachers to maintain their performance. The ability of teachers to identify the competencies required by their profession is very critical to enable them to make improvements in teaching and learning. For a broader perspective the competency needs of the labour market have to be matched by those developed within the vocational learning processes. Consequently, this study has focused on developing and validating the new empirical based TVET-teacher competency profile and evaluating teacherโ€™s competency. This study combines both quantitative and qualitative research methodology that was designed to answer all the research questions. The new empirical based competency profile development and TVET-teacher evaluation was based upon an instructional design model. In addition, a modified Delphi technique has also been adopted throughout the process. Initially, 98 elements of competencies were listed by expert panel and rated by TVET institutions as important. Then, analysis using manual and statistical procedure found that 112 elements of competencies have emerged from seventeen (17) clusters of competencies. Prior to that, using the preliminary TVET-teacher competency profile, the level of TVETteacher competencies was found to be Proficient and the finding of 112 elements of competencies with 17 clusters was finally used to develop the new empirical based competency profile for MARA TVET-teacher. Mean score analysis of teacher competencies found that there were gaps in teacher competencies between MARA institutions (IKM) and other TVET institutions, where MARA-teacher was significantly better than other TVET teacher. ANOVA and t-test analysis showed that there were significant differences between teacher competencies among all TVET institutions in Malaysia. On the other hand, the study showed that teacherโ€™s age, grade and year of experience are not significant predictors for TVET-teacher competency. In the context of mastering the competency, the study also found that three competencies are classified as most difficult or challenging, twelve competencies are classified as should be improved, and eight competencies are classified as needed to be trained. Lastly, to make NDTS implementation a reality for MARA the new empirical based competency profile and the framework for career development and training pathway were established. This Framework would serve as a significant tool to develop the knowledge based human resources needed. This will ensure that TVET-teachers at MARA are trained to be knowledgeable, competent, and professional and become a pedagogical leader on an ongoing basis towards a world class TVET-education system

    The Influence of ZnO Layer Thickness on the Performance and Electrical Bias Stress Instality in ZnO Thin Film Transistors

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    University of Buea supported the first author during the writing of this manuscript Open access articleThin Film Transistors (TFTs) are the active elements for future large area electronic applications, in which low cost, low temperature processes and optical transparency are required. Zinc oxide (ZnO) thin film transistors (TFTs) on SiO2/n+-Si substrate are fabricated with the channel thicknesses ranging from 20 nm to 60 nm. It is found that both the performance and gate bias stress related instabilities of the ZnO TFTs fabricated were influenced by the thickness of ZnO active channel layer. The effective mobility was found to improve with increasing ZnO thickness by up to an order in magnitude within the thickness range investigated (20 โ€“ 60 nm). However, thinner films were found to exhibit greater stability in threshold voltage and turn-on voltage shifts with respect to both positive and negative gate bias stress. It was also observed that both the turn on voltage (Von) and the threshold voltage (VT) decrease with increasing channel thickness. Moreover, the variations in subthreshold slope (S) with ZnO thickness as well as variations in VT and Von suggest a possible dependence of trap states in the ZnO on the ZnO thickness. This is further correlated by the dependence of VT and Von instabilities with gate bias stress

    Dielectric breakdown II: Related projects at the University of Twente

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    In this paper an overview is given of the related activities in our group of the University of Twente. These are on thin film transistors with the inherent difficulty of making a gate dielectric at low temperature, on thin dielectrics for EEPROM devices with well-known requirements with respect to charge retention and endurance and, finally, on thin film diodes in displays with unexpected breakdown properties

    Impact of dopant species on the interfacial trap density and mobility in amorphous In-X-Zn-O solution-processed thin-film transistors

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    Alloying of In/Zn oxides with various X atoms stabilizes the IXZO structures but generates electron traps in the compounds, degrading the electron mobility. To assess whether the latter is linked to the oxygen affinity or the ionic radius, of the X element, several IXZO samples are synthesized by the sol-gel process, with a large number (14) of X elements. The IXZOs are characterized by XPS, SIMS, DRX, and UV-spectroscopy and used for fabricating thin film transistors. Channel mobility and the interface defect density NST, extracted from the TFT electrical characteristics and low frequency noise, followed an increasing trend and the values of mobility and NST are linked by an exponential relation. The highest mobility (8.5 cm2/Vs) is obtained in In-Ga-Zn-O, and slightly lower value for Sb and Sn-doped IXZOs, with NST is about 2E12 cm2/eV, close to that of the In-Zn-O reference TFT. This is explained by a higher electronegativity of Ga, Sb, and Sn than Zn and In, their ionic radius values being close to that of In and Zn. Consequently, Ga, Sb, and Sn induce weaker perturbations of In-O and Zn-O sequences in the sol-gel process, than the X elements having lower electronegativity and different ionic radius. The TFTs with X = Ca, Al, Ni and Cu exhibited the lowest mobility and NST > 1E13 cm2/eV, most likely because of metallic or oxide clusters formation

    An amorphous oxide semiconductor thin-film transistor route to oxide electronics

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    Amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) invented only one decade ago are now being commercialized for active-matrix liquid crystal display (AMLCD) backplane applications. They also appear to be well positioned for other flat-panel display applications such as active-matrix organic light-emitting diode (AMOLED) applications, electrophoretic displays, and transparent displays. The objectives of this contribution are to overview AOS materials design; assess indium gallium zinc oxide (IGZO) TFTs for AMLCD and AMOLED applications; identify several technical topics meriting future scrutiny before they can be confidently relied upon as providing a solid scientific foundation for underpinning AOS TFT technology; and briefly speculate on the future of AOS TFTs for display and non-display applications

    Modeling and Applications of Hydrogenated Amorphous Silicon Thin Film Transistors

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    Very recently, the hydrogenated amorphous silicon thin film transistor (a-Si:H TFT) has shown its important application as an on-board driver for large-area flat-panel liquid crystal displays. It is also highly desirable to have on-board TFT logic circuits adjacent to the TFT driver matrix and have them implemented in the same technology on the same substrate. This reduces the number of lead connections to the display and hence the cost, and increases the reliability of the display. The first area to be investigated is the modeling of ID vs. VD static output characteristics of the n-channel a-Si:H TFT. Second, ambipolar characteristics of the a-Si:H TFT are investigated and modeled. Thereby device models for CAD circuit simulation programs are made available for circuit design. Third, a novel CMOS-like inverter circuit is presented as an application of the ambipolar a-Si:H TFT, and its static characteristics are analytically modeled. The transient response of the TFT is also characterized and modeled in order to understand its device limitations and to quantify its speed. Finally, the dynamic characteristics of the ambipolar a-Si:H TFT inverter are investigated and modeled so that its switching speed can be predicted and the optimized inverter can be designed

    Silicon Nitride Deposition, Chromium Corrosion Mechanisms and Source/Drain Parasitic Resistance in Amorphous Silicon Thin Film transistors

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    Hydrogenated amorphous silicon (a-Si:H) based thin film transistors (TFTs) are finding increased application as switching elements in active-matrix liquid crystal displays (AMLCDs). Extensive research has been focussed on optimizing fabrication conditions to improve materials quality and on reducing channel length to increase device speed. However, the basic physics and chemistry have not yet been fully understood. In addition, little attention has been paid to the significant effect of source/drain parasitics. The work described in this thesis is closely related to the speed and stability issues on the discrete device level. Specifically, the influence of gate nitride deposition and its NH3 plasma treatment has been studied. The competing effects of nitridation reaction and radiation damage were found to cause an interesting trade-off between the device stability and speed. Further effort was devoted to the analysis of an important TFT failure phenomenon. Both electrical and spectroscopic techniques were utilized for gate Cr corrosion studies. It was determined that the corrosion was largely promoted by the CF4 plasma exposure of Cr during the fabrication. Finally, new test structures were designed, fabricated and characterized to study the source/drain parasitic resistance

    Electrical characterisation of simple a-Si:H and nc-Si devices on paper substrates deposited by hot wire chemical vapour deposition and printing techniques

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    Includes bibliographical references (leaves 68-72).In this work we report on the electrical transport properties of two classes of silicon: hydrogenated amorphous silicon (a-Si:H) obtained by hot wire chemical vapour deposition (HWCVD), and printed nanocrystalline silicon (nc-Si), both deposited on a flexible, lightweight substrate of 80 g m-2 wood-free paper. For different devices such as field effect transistors and n-i-p solar cells, electrical measurements will be discussed. A special emphasis is placed on field effect mobility and amplification factor measurements because these provide information about the quality of the material

    ํ”Œ๋ผ์ฆˆ๋งˆ ํ™”ํ•™ ๊ธฐ์ƒ ์ฆ์ฐฉ๋ฒ•์„ ์ด์šฉํ•œ ๋ฒ ๋ฆฌ์–ด ํ•„๋ฆ„ ํ•ฉ์„ฑ๊ณผ ๋””์Šคํ”Œ๋ ˆ์ด ์‘์šฉ

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    ํ•™์œ„๋…ผ๋ฌธ (๋ฐ•์‚ฌ)-- ์„œ์šธ๋Œ€ํ•™๊ต ๋Œ€ํ•™์› : ์ž์—ฐ๊ณผํ•™๋Œ€ํ•™ ํ™”ํ•™๋ถ€, 2019. 2. ํ™๋ณ‘ํฌ.์ž๋ฐœ๊ด‘ํ˜• ๋””์Šคํ”Œ๋ ˆ์ด์ด๋ฉฐ, ์ €์ „์•• ๊ตฌ๋™์ด ๊ฐ€๋Šฅํ•˜๊ณ  ์–‡์€ ๋‘๊ป˜๋กœ ์ œ์ž‘์ด ๊ฐ€๋Šฅํ•˜๋ฉฐ ๋™์ž‘์†๋„๊ฐ€ ๋งค์šฐ ๋น ๋ฅผ ๋ฟ๋งŒ ์•„๋‹ˆ๋ผ ๋†’์€ ํ•ด์ƒ๋„ ๊ตฌํ˜„์ด ๊ฐ€๋Šฅํ•œ OLED๋Š” ๋””์Šคํ”Œ๋ ˆ์ด์—์„œ ๋น ๋ฅธ ์„ฑ์žฅ์„ธ๋ฅผ ๋ณด์ด๊ณ  ์žˆ๋‹ค. ์ตœ๊ทผ OLED์˜ ๊ฐ€์žฅ ํฐ ๊ด€์‹ฌ ๋ถ„์•ผ๋Š” ๋ชจ๋ฐ”์ผ์šฉ ๋””์Šคํ”Œ๋ ˆ์ด์™€ ๋Œ€๋ฉด์  TV, ๊ทธ๋ฆฌ๊ณ  ํ”Œ๋ ‰์‹œ๋ธ” ๋ฐ ํˆฌ๋ช… ๋””์Šคํ”Œ๋ ˆ์ด ๊ตฌํ˜„์ด๋‹ค. ๋””์Šคํ”Œ๋ ˆ์ด๋ฅผ ๊ตฌ๋™ํ•˜๊ธฐ ์œ„ํ•œ ๊ตฌ๋™์†Œ์ž๋Š” ์ˆ˜๋™ํ˜•(passive matrix)๊ณผ ๋Šฅ๋™ํ˜•(active matrix, AM)๋กœ ๋‚˜๋‰˜๋ฉฐ, ์ˆ˜๋™ํ˜•์— ๋น„ํ•˜์—ฌ ๊ณ ํ™”์งˆ, ๋‚ฎ์€ ์†Œ๋น„ ์ „๋ ฅ, ๋Œ€ํ˜•ํ™”์— ์œ ๋ฆฌํ•œ ๋Šฅ๋™ํ˜• ๋””์Šคํ”Œ๋ ˆ์ด๊ฐ€ ์„ ํ˜ธ๋œ๋‹ค. ํ‘œ์‹œ์†Œ์ž๋ฅผ ๋Šฅ๋™ ๊ตฌ๋™ํ•˜๊ธฐ ์œ„ํ•ด์„œ๋Š” ๊ฐ ํ™”์†Œ๋งˆ๋‹ค ๋ฐ•๋ง‰ ํŠธ๋žœ์ง€์Šคํ„ฐ(thin-film transistor, TFT)์™€ ๊ฐ™์€ ์Šค์œ„์นญ ์†Œ์ž๋ฅผ ๋ถ€์ฐฉ์‹œ์ผœ์•ผ ํ•œ๋‹ค. ๋Šฅ๋™ํ˜• ๊ตฌ๋™์†Œ์ž์˜ ๊ฒฝ์šฐ ํ˜„์žฌ์˜ TFT-LCD๋‚˜ AMOLED์šฉ ๋ฐฑํ”Œ๋ ˆ์ธ์— ์ฃผ๋กœ ์‚ฌ์šฉ๋˜๋Š” ๋น„์ •์งˆ ์‹ค๋ฆฌ์ฝ˜(a-Si), ์ €์˜จ ๋‹ค๊ฒฐ์ • ์‹ค๋ฆฌ์ฝ˜ (LTPS) ๊ธฐ์ˆ ์ด ์šฐ์„  ๊ฐœ๋ฐœ๋˜์–ด ์‘์šฉ๋˜๊ณ  ์žˆ๋‹ค. ์ตœ๊ทผ์—๋Š” ํฐ ๋ฐด๋“œ ๊ฐญ์„ ๊ฐ€์ง€๋Š” ๋น„์ •์งˆ ์‚ฐํ™”๋ฌผ ๋ฐ˜๋„์ฒด๋ฅผ ์ด์šฉํ•ด ํˆฌ๋ช…ํ•˜๋ฉด์„œ ๋น ๋ฅธ ์‘๋‹ต์†๋„์˜ ๋””์Šคํ”Œ๋ ˆ์ด ๊ตฌ๋™์†Œ์ž์— ๋Œ€ํ•œ ์—ฐ๊ตฌ๊ฐ€ ํ™œ๋ฐœํžˆ ์ง„ํ–‰๋˜๊ณ  ์žˆ๋‹ค. ๋˜ํ•œ ๋ฐฐ์„ ์˜ RC Delay๋ฅผ ์ตœ์†Œํ™” ์‹œ์ผœ์•ผ ํ•˜๊ณ , ํŒŒ์›Œ์†Œ๋น„๋Ÿ‰์„ ์ค„์—ฌ์•ผ ํ•˜๋Š” ๊ธฐ์ˆ ์ ์ธ ๋ฌธ์ œ๊ฐ€ ์žˆ๋‹ค. ๋””์Šคํ”Œ๋ ˆ์ด์˜ ๊ณ ํ•ด์ƒ๋„์ธ UHD (Ultra High Definition)์˜ backplane์—์„œ ๊ณ ์† TFT ๊ตฌํ˜„์„ ์œ„ํ•˜์—ฌ SD(Source-Drain) ๋ฉ”ํƒˆ ๋ฐฐ์„  ๊ตฌํ˜„์€ ํ•„์ˆ˜์ ์ธ ์š”์†Œ์ด๋‹ค. ๋ณธ ์—ฐ๊ตฌ์—์„œ๋Š” SD ๋ฉ”ํƒˆ ๋ฐฐ์„ ์œผ๋กœ์จ ์ €์ €ํ•ญ ๋ฐฐ์„ ์ธ Copper ๋ฐฐ์„ ์˜ diffusion barrier ์—ญํ• ์„ ํ•˜๋Š” Graphite ์„ฑ์žฅ์„ ๋‹ค๋ฃจ๊ณ  ์žˆ๋‹ค. ๊ธฐ์กด์˜ Graphene ํ•ฉ์„ฑ์€ ๊ธฐ๊ณ„์  ๋ฐ ํ™”ํ•™์  ๋ฐ•๋ฆฌ ๋ฐฉ๋ฒ•์—๋Š” ๋Œ€๋ฉด์  ํŒจ๋„ ๊ตฌํ˜„์œผ๋กœ์จ ํ•œ๊ณ„๊ฐ€ ์žˆ๋‹ค. ํ˜„์žฌ๊นŒ์ง€ ๋Œ€ํ˜• Size scale Graphene ์‹œ๋„๋Š” ์ „๊ทน์œผ๋กœ์จ Graphene ํ™œ์šฉ์€ ์žˆ์ง€๋งŒ, ์ด ๊ตฌํ˜„์€ Thermal CVD (900~1000โ„ƒ)์—์„œ Graphene ์„ ํ•ฉ์„ฑํ•˜๊ณ , Glass์— transfer ํ•œ ๋…ผ๋ฌธ์œผ๋กœ์จ ์‹ค์ œ ๋Œ€๋ฉด์ ์œผ๋กœ ๋งŒ๋“œ๋Š” ๊ณต์ • ์ ์šฉ์—๋Š” ํ•œ๊ณ„๊ฐ€ ์žˆ๋‹ค. ์ด์— ํ˜„์žฌ ๋งŽ์ด ์—ฐ๊ตฌ๋Š” ์ง„ํ–‰ ์ค‘์ด๊ณ  ์žˆ์ง€๋งŒ, PECVD (Plasma Enhanced Chemical Vapor Deposition)๋ฅผ ์ด์šฉํ•œ graphite ๋ฐ•๋ง‰ ํ•ฉ์„ฑ์€ ๋Œ€ํ˜• size, mass production์„ ๊ฐ€๋Šฅํ•˜๊ฒŒ ํ•˜๋ฉฐ, ์•„์ง mass production ์ ์šฉ์„ ์œ„ํ•ด ์—ฐ๊ตฌํ•ด์•ผ ํ•  ์ ์€ ๋งŽ์ง€๋งŒ, ์ €์˜จ ๊ณต์ • Graphite ํ•ฉ์„ฑ์ด ๊ฐ€๋Šฅํ•˜๋‹ค๋ฉด, large scale device ๊ตฌํ˜„์— ํ•œ์ธต ๋” ์ง„๋ณด๋œ ๊ธฐ์ˆ ์ด ๋  ๊ฒƒ์ž„์„ ํ™•์‹ ํ•œ๋‹ค. ๋ณธ ์—ฐ๊ตฌ์—์„œ Copper diffusion barrier ์œผ๋กœ์จ์˜ ์—ญํ• ์„ ๊ฒ€์ฆํ•˜๊ณ , ์ฆ์ฐฉ ์˜จ๋„๋ฅผ ์ €์˜จ์œผ๋กœ ํ•ฉ์„ฑํ•จ์œผ๋กœ์จ TEM ๋ฐ EDAX ๋ถ„์„์œผ๋กœ Graphite barrier ๋ฐ mass production์˜ ๊ฐ€๋Šฅ์„ฑ์„ ๊ฒ€์ฆํ•˜์˜€๋‹ค. ๋ณธ ์—ฐ๊ตฌ์˜ ์ง์ ‘์ ์ธ PECVD ํ•ฉ์„ฑ ๋ฐฉ๋ฒ•์„ ํ†ตํ•ด ๋Œ€๋ฉด์ ์ด ๊ฐ€๋Šฅํ•จ์„ ์ œ์‹œํ•จ์œผ๋กœ์จ ๊ธฐ์กด์˜ ๋Œ€๋ฉด์  ํ•ฉ์„ฑ ๋ฌธ์ œ์ ์„ ํ•ด๊ฒฐํ•ด ์ค„ ์ˆ˜ ์žˆ๋Š” ๋ฐฉ์•ˆ์ด ๋  ๊ฒƒ์ด๋‹ค. ๋˜ํ•œ ๋””์Šคํ”Œ๋ ˆ์ด์˜ TFT ํŠน์„ฑ๋„ ๊ธฐ์กด์˜ Active material ์ธ a-Si TFT๋ณด๋‹ค ํ›จ์”ฌ ๋” ๋†’์€ ๊ณ ์ด๋™๋„ ์†Œ์ž๋ฅผ ์š”๊ตฌํ•˜๋ฉฐ, ํŠนํžˆ ํˆฌ๋ช… ๋””์Šคํ”Œ๋ ˆ์ด์˜ ์ ์šฉ ๊ฐ€๋Šฅํ•˜๋ฉฐ, ๊ณ ์ด๋™๋„ ํŠน์„ฑ์„ ๊ท ์ผํ•˜๊ฒŒ ๊ฐ€์งˆ ์ˆ˜ ์žˆ๋Š” ์‹ ๊ทœ TFT๋ฅผ ์š”๊ตฌํ•˜๊ฒŒ ๋˜์—ˆ๋‹ค. ์ด์— ๋Œ€ํ•œ ๋ฐฉ์•ˆ์œผ๋กœ ์‚ฐํ™”๋ฌผ TFT๋กœ์จ ZnO (Zinc Oxide), IZO (Indium Zinc Oxide), a-IGZO (Amorphous Indium Gallium Zinc Oxide) ๋“ฑ์˜ ์žฌ๋ฃŒ๊ฐ€ ์—ฐ๊ตฌ๋˜๊ณ  ์žˆ๋‹ค. ๊ธฐ์กด์˜ a-Si์˜ ์ด๋™๋„ (<1cm2/VยทS) ๋ณด๋‹ค ๋†’์€ ์ด๋™๋„๋ฅผ ๊ฐ€์ง„ IGZO ์žฌ๋ฃŒ๋Š” ํˆฌ๋ช…ํ•œ ์†Œ์ž๋กœ์จ ํˆฌ๋ช…๋””์Šคํ”Œ๋ ˆ์ด์—์„œ๋„ ํ™œ์šฉ์ด ๊ฐ€๋Šฅํ•˜์—ฌ, ์‘์šฉ์„ฑ์„ ํ™•๋Œ€ํ•˜๊ณ  ์žˆ๋‹ค. ๋ณธ ์—ฐ๊ตฌ์—์„œ๋Š” ํˆฌ๋ช…๋””์Šคํ”Œ๋ ˆ์ด ์—์„œ๋„ ํ™œ์šฉ์ด ๊ฐ€๋Šฅํ•˜๋„๋ก a-IGZO๋ฅผ substrate๋กœ ํ•˜๋Š” Graphite ๋ฐ•๋ง‰์„ ํ•ฉ์„ฑ ๋ฐฉ๋ฒ•์„ ์ œ์‹œํ•˜๊ณ , ๋Œ€๋ฉด์  ๊ตฌํ˜„์œผ๋กœ์จ ๊ทธ ์‘์šฉ์„ฑ์„ ๊ธฐ๋Œ€ํ•˜๊ณ  ์žˆ๋‹ค. Graphite์˜ ์ €์˜จ ํ•ฉ์„ฑ ๊ธฐ์ˆ  ๊ฐœ๋ฐœ์€ ๊ธฐ์กด ๋ผ์ธ์˜ CVD ์žฅ๋น„ ๊ต์ฒด ์—†์ด ๋‹จ์ง€ Graphene Gas ์‚ฌ์šฉ๋งŒ์œผ๋กœ ๊ณต์ •์„ ๊ตฌํ˜„ํ•œ๋‹ค๋Š” ์ ์ด cost ๋ฐ ๊ณต์ • ๋‹จ์ˆœํ™”์˜ ๊ด€์ ์—์„œ ๋งŽ์€ ์žฅ์ ์ด ์žˆ๋‹ค. ๋˜ํ•œ ๊ณ ์† ๊ตฌ๋™์„ ์œ„ํ•˜์—ฌ SD ๋ฐฐ์„ ์œผ๋กœ metal๋ฟ ์•„๋‹ˆ๋ผ ์‚ฐํ™”๋ฌผ ๋ฐ˜๋„์ฒด๋กœ๋„ Graphite ํ•ฉ์„ฑ์˜ catalyst๋กœ์จ ์‚ฌ์šฉ๋˜์–ด, ํŒจ๋„ ๊ตฌํ˜„์„ ๊ฐ€๋Šฅํ•˜๊ฒŒ ํ•ด์ค€๋‹ค๋Š” ๊ด€์ ์—์„œ ์˜๋ฏธ๊ฐ€ ์žˆ๋‹ค. ๋˜ํ•œ Graphite ํ•ฉ์„ฑ ๊ธฐ์ˆ ์„ thin film ๋ฐ•๋ง‰์„ ๋งŒ๋“ค์–ด ๋‹ค๋ฅธ application ์—์„œ๋„ ํ™œ์šฉ ๊ฐ€๋Šฅํ•จ์„ ๋ณด์—ฌ์คŒ์œผ๋กœ์จ ํŒŒ๊ธ‰ ํšจ๊ณผ๊ฐ€ ํฌ๋‹ค๊ณ  ํŒ๋‹จ๋œ๋‹ค. ๋‹ค์Œ ์—ฐ๊ตฌ์—์„œ๋Š” LCD ๋””์Šคํ”Œ๋ ˆ์ด์—์„œ Backlight ์‚ฌ์šฉ์ด ํ•„์ˆ˜์ ์ด๋‹ค. Back light๋Š” ๊ฐ€์‹œ๊ด‘์„  ์˜์—ญ ๋ฟ ์•„๋‹ˆ๋ผ UV ํŒŒ์žฅ์˜์—ญ๋„ ํฌํ•จํ•˜๊ณ  ์žˆ์œผ๋ฉฐ, Active ์žฌ๋ฃŒ์ธ a-IGZO ์†Œ์ž์—์„œ TFT ํŠน์„ฑ์˜ ๋ถˆ์•ˆ์ •์„ฑ์˜ ๋ฌธ์ œ๋ฅผ ๊ฐ€์ง€๊ณ  ์žˆ๋‹ค. IGZO์˜ ํŠน์„ฑ์ƒ UV ํŒŒ์žฅ๋Œ€์—์„œ์˜ ๋น›๊ณผ์˜ ๋ฐ˜์‘์œผ๋กœ TFT ์†Œ์ž์˜ ์‹ ๋ขฐ์„ฑ ํŠน์„ฑ์ด ์•…ํ™”๋˜๋Š” ๋ฌธ์ œ์ ์„ ํ•ด๊ฒฐํ•˜๊ณ ์ž Barrier ๋ฐ•๋ง‰์„ ์‚ฌ์šฉ์ด ํ•„์ˆ˜์ ์ธ ์š”์†Œ์ด๋‹ค. ๋ณธ ์—ฐ๊ตฌ์—์„œ๋Š” TFT์˜ ์‹ ๋ขฐ์„ฑ ๋ฐ ์•ˆ์ •์„ฑ์„ ์œ ์ง€ํ•˜๊ธฐ ์œ„ํ•ด์„œ Photo blocking barrier๋กœ์จ SiGe (Silicon Germanium) ๋ฐ•๋ง‰ ์žฌ๋ฃŒ ํ•ฉ์„ฑ์„ ํ†ตํ•˜์—ฌ TFT ์‹ ๋ขฐ์„ฑ์˜ ํŠน์„ฑ ๋ณ€ํ™” ์—†๋Š” ๊ฒƒ์„ ์—ฐ๊ตฌํ•˜์˜€๋‹ค. ์ด์ „ SiGe ์—ฐ๊ตฌ๋˜์–ด์ง„ ๋ฐ”๋กœ๋Š” ํƒœ์–‘์ „์ง€์—์„œ P-I(intrinsic layer)-Nํ˜• ๊ตฌ์กฐ์—์„œ ์ค‘๊ฐ„ ์‚ฝ์ž…์ธต์—์„œ ๋ถˆ์ˆœ๋ฌผ์ด ์ฒจ๊ฐ€๋˜์ง€ ์•Š์€ ๋ฌด์ฒจ๊ฐ€์ธต (Intrinsic layer)์—์„œ SiGe ์ด ๊ด‘ํก์ˆ˜์ธต์œผ๋กœ ์‚ฌ์šฉ๋˜์–ด์ง„ ์—ฐ๊ตฌ๊ฐ€ ์žˆ์—ˆ๋‹ค. ๋ณธ ์—ฐ๊ตฌ์—์„œ๋Š” TFT ์†Œ์ž์—์„œ a-IGZO ๊ฐ€ ๊ด‘๋ฐ˜์‘์œผ๋กœ ์ธํ•ด ์‚ฐ์†Œ ๊ฒฐํ• (Oxygen Vacancy)์„ ๋ง‰์•„ TFT ํŠน์„ฑ์˜ ์ €ํ•˜ ํšจ๊ณผ๋ฅผ ๋ง‰๊ณ ์ž SiGe์˜ ๊ด‘ ์ฐจ๋‹จ ๋ฐ•๋ง‰ ํ˜•์„ฑ์„ ํ†ตํ•ด ๊ด‘๋ฐ˜์‘์œผ๋กœ ์ธํ•œa-IGZOํŠน์„ฑ ๋ณ€ํ™”๊ฐ€ ๋˜์ง€ ์•Š๋„๋ก ํ•˜์˜€๋‹ค. ๋˜ํ•œ ๋ฐ•๋ง‰ ํ˜•์„ฑ ๋ฐ ์ ์ธต ๊ตฌ์กฐ์—์„œ SiGe ์™€ IGZO์˜ ๋ฐ•๋ง‰ ์‚ฌ์ด์— Capacitance ํ˜•์„ฑ์œผ๋กœ ์ „์ž์˜ charge๊ฐ€ IGZO ๋ฐ•๋ง‰ ๊ณ„๋ฉด์— ๋ˆ„์ ๋˜์–ด, ํŠธ๋žœ์ง€์Šคํ„ฐ ํŠน์„ฑ์ด ๋‹จ๋ฝ(short) ํ˜„์ƒ์ด ๋ฐœ์ƒ ํ•˜์˜€์œผ๋ฉฐ, ์ด๋ฅผ ๋ฐฉ์ง€ํ•˜๊ธฐ ์œ„ํ•ด Buffer layer ์˜ ๋‘๊ป˜ ์กฐ์ ˆ์ด ์ค‘์š”ํ•˜์˜€๋‹ค. ์ด์— Buffer layer์˜ ๋‘๊ป˜ ์ตœ์ ํ™”๋ฅผ ํ†ตํ•ด ํ•˜๋ถ€์—์„œ ๋“ค์–ด์˜ค๋Š” ๋น›์—๋„ ์ฐจ๋‹จ์„ ํ•  ์ˆ˜ ์žˆ๋Š” Barrier ์ ์ธต ๊ตฌ์กฐ๋ฅผ ๋งŒ๋“ค์–ด TFT ์†Œ์ž์˜ ์‹ ๋ขฐ์„ฑ ๊ฐœ์„ ๋จ์„ ๋ณด์—ฌ์ฃผ๊ณ ์ž ํ•˜์˜€๋‹ค. ์Šค๋งˆํŠธ Window ๋ฐ ๋ƒ‰์žฅ๊ณ ์—์„œ ๋ฌธ์„ ์—ด์ง€ ์•Š๊ณ  ๋‚ด์šฉ๋ฌผ์„ ํ™•์ธํ•  ์ˆ˜ ์žˆ๋Š” ํˆฌ๋ช… ๋””์Šคํ”Œ๋ ˆ์ด ๋ฐ ํ”Œ๋ ‰์‹œ๋ธ” ๋””์Šคํ”Œ๋ ˆ์ด ๊ตฌํ˜„์„ ์œ„ํ•ด ์—ฌ๋Ÿฌ ์š”์†Œ์˜ ๊ธฐ์ˆ  ์—ฐ๊ตฌ๊ฐ€ ์ง„ํ–‰๋˜๊ณ  ์žˆ์œผ๋ฉฐ, ์ด ๊ตฌํ˜„์„ ์œ„ํ•ด ๋ณธ ์—ฐ๊ตฌ์˜ Barrier ๋ฐ•๋ง‰ ๊ตฌํ˜„์€ ํ•„์ˆ˜์ ์ธ ์š”์†Œ๋กœ ์‘์šฉ์„ฑ์ด ํ™•๋Œ€๋˜์–ด ํ™œ์šฉ๋จ์„ ๊ธฐ๋Œ€ํ•ด ๋ณธ๋‹ค.OLED is a self-emissive display can be driven at low voltage and manufactured in a thin layer. In addition, this display operates at a very high speed and emit a color that can be rapidly implemented. Recently, OLEDs main interest is mobile screen, large screen TV, flexible and transparent display. The driving device for display is classified to the passive matrix and active matrix. Active matrix is preferred because of higher resolution, lower energy consumption, and large size screen. To apply active matrix on display device, a switching device such as thin-film transistor (TFT) is attached to each pixel. For active driving devices, amorphous silicon (a-Si) and low-temperature polycrystalline silicon (LTPS) technologies are applied in current TFT โ€“LCD or AMOLED back frame. Recently, there is an ongoing research on using amorphous oxide semiconductors with large bandgaps to research transparent and fast responsive display driving devices. Moreover, RC delay has a technical problem that must be minimized and reduce power consumption. Implementation of Source Drain (SD) is a metal wiring essential element for high-speed TFT execution in high-resolution UHD (Ultra High Definition) displays backplane. In this study, the graphite growth plays the role of diffusion barrier of copper wiring that has low resistance wiring with SD metal wiring. The chemical and mechanical stripping methods of conventional graphene synthesis application on large area panels is limited. Up to now, the large size graphene has been used as an electrode, but this implementation is limited to making the large-scale process by synthesizing graphene at thermal CVD (900~1000ยฐC) and transferring it to the glass. Despite the fact, a lot of ongoing studies, graphites thin film synthesis using Plasma Enhanced Chemical Vapor Deposition (PECVD) enables large size and mass production. Furthermore, this area still requires more research on mass production. If low-temperature process for graphite synthesis is possible, this will become a more advanced technology for device implementation. In this study, the role of copper diffusion barrier was verified, and the possibility of graphite barrier and mass production was verified by TEM and EDAX analysis by synthesizing the deposition temperature at low temperature. In addition, this study suggests the large size display can be obtained through direct PECVD synthesis that will solve the existing problems of large size synthesis. The displays TFT characteristics also require a high mobility device that is much higher than the conventional active material a-Si TFT. In particular, a new TFT capable of applying a transparent display and uniformly having high mobility characteristics is required. Materials such as ZnO (Zinc Oxide), IZO (Indium Zinc Oxide) and IGZO (Indium Gallium Zinc Oxide) have been studied as oxide TFTs. IGZO materials with higher mobility than conventional a-Si mobility (<1 cm2 / V ยท s) are transparent devices and can be used in transparent displays, thus extending applicability. In this study, we propose a graphite synthesis based on IGZO to be applicable to transparent display and expect the application on large size displays. The low-temperature Graphite synthesis has many advantages in terms of cost and process simplification because it implements the process only by using Graphene gas without replacing existing CVD equipment. In addition, it can be used as a graphite synthesis catalyst not only for metal but also for the oxide semiconductor, to raise activation. Moreover, the graphite synthesis to make a thin film can be applied to other fields. In the next study, it is essential to use backlight in LCD display. The backlight not only includes the visible light but also the UV region, and has instability of TFT characteristics in the active material IGZO device. Due to IGZOs reaction to light in UV region, it is essential to use a barrier film in order to solve the reliability characteristics of the TFT device deterioration. To maintain the reliability and stability of the TFT, this study on reliability of the TFT was not changed by SiGe (Silicon Germanium) synthesis thin film as a photo blocking barrier. Based on previous research on SiGe has been used as the light absorbing layer in the intrinsic layer in which a P-I (intrinsic layer)-N type structure in a solar cell that is not doped with an impurity in an intermediate insertion layer. In this study, in order to prevent oxygen vacancy during a-IGZO photoreaction on TFT device, the formation of a light-shielding film of Si-Ge prevents oxygen deficiency. Capacitance formation between SiGe and IGZO thin film in the thin film formation and lamination structure accumulates electrons charge on the IGZO thin film interface. The characteristics of the transistor were short, and to prevent this shortness, it is important to control the thickness of the buffer layer. Therefore, this shows that the reliability of the TFT device is improved by making the barrier laminate structure that can block the light from the bottom through the optimization of the thickness of the buffer layer. There are various ongoing technological studies on transparent and flexible displays that to observe the contents without opening the door through the smart window and refrigerator. For this application, the thin film barrier is an essential element and expect to be implemented.Table of Contents Abstract.........................................................................1 Contents........................................................................6 List of Figures.................................................................9 List of Tables................................................................15 Chapter 1. Introduction................................................16 1.1. Graphene characteristics 1.2. Amorphous Si:H and LTPS TFT backplane technology in display 1.3. High performance amorphous In-Ga-Zn-O TFTs 1.4. Overview of PECVD system 1.5. References Chapter 2. Growth of thin graphite films for solid diffusion barriers .......................................................60 2.1. Large-scale transfer-free growth of thin graphite films at low temperature for solid diffusion barriers 2.1.1. Introduction 2.1.2. Experimental 2.1.3. Results and discussion 2.1.4. Conclusion 2.1.5. References Chapter 3. Growth of silicon germanium films for photo-blocking layers in industrial display.................99 3.1. Silicon germanium photo-blocking layers for a-IGZO based industrial display 3.1.1. Introduction 3.1.2. Experimental 3.1.3. Results and Discussion 3.1.4. Conclusion 3.1.5. References Abstract in Koreanโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆ130 Appendixโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆโ€ฆ135Docto
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