105,808 research outputs found
Hierarchical hybrid logic
We introduce HHL, a hierarchical variant of hybrid logic. We study first order correspondence results and prove a Hennessy-Milner like theorem relating (hierarchical) bisimulation and modal equivalence for HHL. Combining hierarchical transition structures with the ability to refer to specific states at different levels, this logic seems suitable to express and verify properties of hierarchical transition systems, a pervasive semantic structure in Computer Science.ERDF European Regional Development Fund,
through the COMPETE Programme, and by National Funds through FCT
- Portuguese Foundation for Science and Technology - within projects
POCI-01-0145-FEDER-016692 and UID/MAT/04106/2013, as well by project
“SmartEGOV: Harnessing EGOV for Smart Governance (Foundations, Methods,
Tools) / NORTE-01-0145-FEDER-000037”, supported by Norte Portugal Regional
Operational Programme (NORTE 2020), under the PORTUGAL 2020 Partnership
Agreement. A. Madeira and R. Neves are further supported by the FCT individual
grants SFRH/BPD/103004/2014 and SFRH/BD/52234/201
Introducing hierarquical hybrid logic
This paper introduces HHL, a hierarchical variant of hybrid logic. First-order correspondence and a Hennessy-Milner like theorem relating (hierarchical) bisimulation and logical equivalence for HHL are presented. Combining hierarchical transition structures with the ability to refer to specific states at any level of description, this logic seems suitable to express and verify properties of hierarchical transition systems, a pervasive semantic structure in Computer Science
A Logic for robotics?
This paper introduces HHL, a hierarchical variant of hybrid logic. First-order correspondence and a Hennessy-Milner like theorem relating (hierarchical) bisimulation and logical equivalence for HHLare presented. Combining hierarchical transition structures with the ability to refer to specific states at any level of description, this logic seems suitable to express and verify properties of hierarchical transition systems, a pervasive semantic structure in Computer Science.Dynamic logic combines logic with programs, which at a certain level of abstraction, can be regarded as behaviours changing the system state and, therefore, the truth value of formulas. This paper suggests a method for generating such logics for the domain of robot controllers and illustrates it with a logic for handling resource consumption
A logic for n-dimensional hierarchical refinement
Hierarchical transition systems provide a popular mathematical structure to
represent state-based software applications in which different layers of
abstraction are represented by inter-related state machines. The decomposition
of high level states into inner sub-states, and of their transitions into inner
sub-transitions is common refinement procedure adopted in a number of
specification formalisms.
This paper introduces a hybrid modal logic for k-layered transition systems,
its first-order standard translation, a notion of bisimulation, and a modal
invariance result. Layered and hierarchical notions of refinement are also
discussed in this setting.Comment: In Proceedings Refine'15, arXiv:1606.0134
Hybrid laws: constitutionalizing private governance networks
s.a.: Das Recht hybrider Netzwerke. Zeitschrift fĂĽr das gesamte Handelsrecht und Wirtschaftsrecht 165, 2001, 550-575.. Italienische Fassung: Diritti ibridi: la costituzionalizzazione delle reti private di governance. In: Gunther Teubner, Costituzionalismo societario. Armando, Roma 2004 (im Erscheinen)
Memory performance of and-parallel prolog on shared-memory architectures
The goal of the RAP-WAM AND-parallel Prolog abstract architecture is to provide inference speeds significantly
beyond those of sequential systems, while supporting Prolog semantics and preserving sequential performance and storage efficiency. This paper presents simulation results supporting these claims with special emphasis on memory performance on a two-level sharedmemory multiprocessor organization. Several solutions to the cache coherency problem are analyzed. It is shown that RAP-WAM offers good locality and storage efficiency and that it can effectively take advantage of broadcast caches. It is argued that speeds in excess of 2 ML IPS on real applications exhibiting medium parallelism can be attained with current technology
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