5 research outputs found
Autonomous Probabilistic Coprocessing with Petaflips per Second
In this paper we present a concrete design for a probabilistic (p-) computer
based on a network of p-bits, robust classical entities fluctuating between -1
and +1, with probabilities that are controlled through an input constructed
from the outputs of other p-bits. The architecture of this probabilistic
computer is similar to a stochastic neural network with the p-bit playing the
role of a binary stochastic neuron, but with one key difference: there is no
sequencer used to enforce an ordering of p-bit updates, as is typically
required. Instead, we explore \textit{sequencerless} designs where all p-bits
are allowed to flip autonomously and demonstrate that such designs can allow
ultrafast operation unconstrained by available clock speeds without
compromising the solution's fidelity. Based on experimental results from a
hardware benchmark of the autonomous design and benchmarked device models, we
project that a nanomagnetic implementation can scale to achieve petaflips per
second with millions of neurons. A key contribution of this paper is the focus
on a hardware metric flips per second as a problem and
substrate-independent figure-of-merit for an emerging class of hardware
annealers known as Ising Machines. Much like the shrinking feature sizes of
transistors that have continually driven Moore's Law, we believe that flips per
second can be continually improved in later technology generations of a wide
class of probabilistic, domain specific hardware.Comment: 13 pages, 8 figures, 1 tabl
Stochastic Memory Devices for Security and Computing
With the widespread use of mobile computing and internet of things, secured communication and chip authentication have become extremely important. Hardware-based security concepts generally provide the best performance in terms of a good standard of security, low power consumption, and large-area density. In these concepts, the stochastic properties of nanoscale devices, such as the physical and geometrical variations of the process, are harnessed for true random number generators (TRNGs) and physical unclonable functions (PUFs). Emerging memory devices, such as resistive-switching memory (RRAM), phase-change memory (PCM), and spin-transfer torque magnetic memory (STT-MRAM), rely on a unique combination of physical mechanisms for transport and switching, thus appear to be an ideal source of entropy for TRNGs and PUFs. An overview of stochastic phenomena in memory devices and their use for developing security and computing primitives is provided. First, a broad classification of methods to generate true random numbers via the stochastic properties of nanoscale devices is presented. Then, practical implementations of stochastic TRNGs, such as hardware security and stochastic computing, are shown. Finally, future challenges to stochastic memory development are discussed