2,670 research outputs found
Early pioneers to reversible computation
Reversible computing is one of the most intensively developing research areas nowadays. We present a survey of less known or forgotten papers to show that a transfer of ideas between different disciplines is possible
Electron Spin for Classical Information Processing: A Brief Survey of Spin-Based Logic Devices, Gates and Circuits
In electronics, information has been traditionally stored, processed and
communicated using an electron's charge. This paradigm is increasingly turning
out to be energy-inefficient, because movement of charge within an
information-processing device invariably causes current flow and an associated
dissipation. Replacing charge with the "spin" of an electron to encode
information may eliminate much of this dissipation and lead to more
energy-efficient "green electronics". This realization has spurred significant
research in spintronic devices and circuits where spin either directly acts as
the physical variable for hosting information or augments the role of charge.
In this review article, we discuss and elucidate some of these ideas, and
highlight their strengths and weaknesses. Many of them can potentially reduce
energy dissipation significantly, but unfortunately are error-prone and
unreliable. Moreover, there are serious obstacles to their technological
implementation that may be difficult to overcome in the near term.
This review addresses three constructs: (1) single devices or binary switches
that can be constituents of Boolean logic gates for digital information
processing, (2) complete gates that are capable of performing specific Boolean
logic operations, and (3) combinational circuits or architectures (equivalent
to many gates working in unison) that are capable of performing universal
computation.Comment: Topical Revie
Assessing Random Dynamical Network Architectures for Nanoelectronics
Independent of the technology, it is generally expected that future nanoscale
devices will be built from vast numbers of densely arranged devices that
exhibit high failure rates. Other than that, there is little consensus on what
type of technology and computing architecture holds most promises to go far
beyond today's top-down engineered silicon devices. Cellular automata (CA) have
been proposed in the past as a possible class of architectures to the von
Neumann computing architecture, which is not generally well suited for future
parallel and fine-grained nanoscale electronics. While the top-down engineered
semi-conducting technology favors regular and locally interconnected
structures, future bottom-up self-assembled devices tend to have irregular
structures because of the current lack precise control over these processes. In
this paper, we will assess random dynamical networks, namely Random Boolean
Networks (RBNs) and Random Threshold Networks (RTNs), as alternative computing
architectures and models for future information processing devices. We will
illustrate that--from a theoretical perspective--they offer superior properties
over classical CA-based architectures, such as inherent robustness as the
system scales up, more efficient information processing capabilities, and
manufacturing benefits for bottom-up designed devices, which motivates this
investigation. We will present recent results on the dynamic behavior and
robustness of such random dynamical networks while also including manufacturing
issues in the assessment.Comment: 8 pages, 6 figures, IEEE/ACM Symposium on Nanoscale Architectures,
NANOARCH 2008, Anaheim, CA, USA, Jun 12-13, 200
Synthesis and Optimization of Reversible Circuits - A Survey
Reversible logic circuits have been historically motivated by theoretical
research in low-power electronics as well as practical improvement of
bit-manipulation transforms in cryptography and computer graphics. Recently,
reversible circuits have attracted interest as components of quantum
algorithms, as well as in photonic and nano-computing technologies where some
switching devices offer no signal gain. Research in generating reversible logic
distinguishes between circuit synthesis, post-synthesis optimization, and
technology mapping. In this survey, we review algorithmic paradigms ---
search-based, cycle-based, transformation-based, and BDD-based --- as well as
specific algorithms for reversible synthesis, both exact and heuristic. We
conclude the survey by outlining key open challenges in synthesis of reversible
and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table
Novel ultra-energy-efficient reversible designs of sequential logic quantum-dot cellular automata flip-flop circuits
The version of record of this article, first published in [The Journal of Supercomputing], is available online at Publisherâs website: http://dx.doi.org/10.1007/s11227-023-05134-1Quantum-dot cellular automata (QCA) is a technological approach to implement digital circuits with exceptionally high integration density, high switching frequency, and low energy dissipation. QCA circuits are a potential solution to the energy dissipation issues created by shrinking microprocessors with ultra-high integration densities. Current QCA circuit designs are irreversible, yet reversible circuits are known to increase energy efficiency. Thus, the development of reversible QCA circuits will further reduce energy dissipation. This paper presents novel reversible and irreversible sequential QCA set/reset (SR), data (D), Jack Kilby (JK), and toggle (T) flip-flop designs based on the majority gate that utilizes the universal, standard, and efficient (USE) clocking scheme, which allows the implementation of feedback paths and easy routing for sequential QCA-based circuits. The simulation results confirm that the proposed reversible QCA USE sequential flip-flop circuits exhibit energy dissipation less than the Landauer energy limit. Irreversible QCA USE flip-flop designs, although having higher energy dissipation, sometimes have floorplan areas and delay times less than those of reversible designs; therefore, they are also explored. The trade-offs between the energy dissipation versus the area cost and delay time for the reversible and irreversible QCA circuits are examined comprehensively
Applying Formal Methods to Networking: Theory, Techniques and Applications
Despite its great importance, modern network infrastructure is remarkable for
the lack of rigor in its engineering. The Internet which began as a research
experiment was never designed to handle the users and applications it hosts
today. The lack of formalization of the Internet architecture meant limited
abstractions and modularity, especially for the control and management planes,
thus requiring for every new need a new protocol built from scratch. This led
to an unwieldy ossified Internet architecture resistant to any attempts at
formal verification, and an Internet culture where expediency and pragmatism
are favored over formal correctness. Fortunately, recent work in the space of
clean slate Internet design---especially, the software defined networking (SDN)
paradigm---offers the Internet community another chance to develop the right
kind of architecture and abstractions. This has also led to a great resurgence
in interest of applying formal methods to specification, verification, and
synthesis of networking protocols and applications. In this paper, we present a
self-contained tutorial of the formidable amount of work that has been done in
formal methods, and present a survey of its applications to networking.Comment: 30 pages, submitted to IEEE Communications Surveys and Tutorial
Universalities in cellular automata; a (short) survey
This reading guide aims to provide the reader with an easy access to the study of universality in the ïŹeld of cellular automata. To fulïŹll this goal, the approach taken here is organized in three parts: a detailled chronology of seminal papers, a discussion of the deïŹnition and main properties of universal cellular automata, and a broad bibliography
- âŠ