Automatic synthesis and optimization of floating point hardware.

Ho Chun Hok.Thesis (M.Phil.)--Chinese University of Hong Kong, 2003.Includes bibliographical references (leaves 74-78).Abstracts in English and Chinese.Abstract --- p.iiAcknowledgement --- p.vChapter 1 --- Introduction --- p.1Chapter 1.1 --- Motivation --- p.1Chapter 1.2 --- Aims --- p.3Chapter 1.3 --- Contributions --- p.3Chapter 1.4 --- Thesis Organization --- p.4Chapter 2 --- Background and Literature Review --- p.5Chapter 2.1 --- Introduction --- p.5Chapter 2.2 --- Field Programmable Gate Arrays --- p.5Chapter 2.3 --- Traditional design flow and VHDL --- p.6Chapter 2.4 --- Single Description for Hardware-Software Systems --- p.7Chapter 2.5 --- Parameterized Floating Point Arithmetic Implementation --- p.8Chapter 2.6 --- Function Approximations by Table Lookup and Addition --- p.9Chapter 2.7 --- Summary --- p.10Chapter 3 --- Floating Point Arithmetic --- p.11Chapter 3.1 --- Introduction --- p.11Chapter 3.2 --- Floating Point Number Representation --- p.11Chapter 3.3 --- Rounding Error --- p.12Chapter 3.4 --- Floating Point Number Arithmetic --- p.14Chapter 3.4.1 --- Addition and Subtraction --- p.14Chapter 3.4.2 --- Multiplication --- p.17Chapter 3.5 --- Summary --- p.17Chapter 4 --- FLY - Hardware Compiler --- p.18Chapter 4.1 --- Introduction --- p.18Chapter 4.2 --- The Fly Programming Language --- p.18Chapter 4.3 --- Implementation details --- p.19Chapter 4.3.1 --- Compilation Technique --- p.19Chapter 4.3.2 --- Statement --- p.21Chapter 4.3.3 --- Assignment --- p.21Chapter 4.3.4 --- Conditional Branch --- p.22Chapter 4.3.5 --- While --- p.22Chapter 4.3.6 --- Parallel Statement --- p.22Chapter 4.4 --- Development Environment --- p.24Chapter 4.4.1 --- From Fly to Bitstream --- p.24Chapter 4.4.2 --- Host Interface --- p.24Chapter 4.5 --- Summary --- p.26Chapter 5 --- Float - Floating Point Design Environment --- p.27Chapter 5.1 --- Introduction --- p.27Chapter 5.2 --- Floating Point Tools --- p.28Chapter 5.2.1 --- Float Class --- p.29Chapter 5.2.2 --- Optimization --- p.31Chapter 5.3 --- Digital Sine-Cosine Generator --- p.33Chapter 5.4 --- VHDL Floating Point operator generator --- p.35Chapter 5.4.1 --- Floating Point Multiplier Module --- p.35Chapter 5.4.2 --- Floating Point Adder Module --- p.36Chapter 5.5 --- Application to Solving Differential Equations --- p.38Chapter 5.6 --- Summary --- p.40Chapter 6 --- Function Approximation using Lookup Table --- p.42Chapter 6.1 --- Table Lookup Approximations --- p.42Chapter 6.1.1 --- Taylor Expansion --- p.42Chapter 6.1.2 --- Symmetric Bipartite Table Method (SBTM) --- p.43Chapter 6.1.3 --- Symmetric Table Addition Method (STAM) --- p.45Chapter 6.1.4 --- Input Range Scaling --- p.46Chapter 6.2 --- VHDL Extension --- p.47Chapter 6.3 --- Floating Point Extension --- p.49Chapter 6.4 --- The N-body Problem --- p.52Chapter 6.5 --- Implementation --- p.54Chapter 6.6 --- Summary --- p.56Chapter 7 --- Results --- p.58Chapter 7.1 --- Introduction --- p.58Chapter 7.2 --- GCD coprocessor --- p.58Chapter 7.3 --- Floating Point Module Library --- p.59Chapter 7.4 --- Digital sine-cosine generator (DSCG) --- p.60Chapter 7.5 --- Optimization --- p.62Chapter 7.6 --- Ordinary Differential Equation (ODE) --- p.63Chapter 7.7 --- N Body Problem Simulation (Nbody) --- p.63Chapter 7.8 --- Summary --- p.64Chapter 8 --- Conclusion --- p.66Chapter 8.1 --- Future Work --- p.68Chapter A --- Fly Formal Grammar --- p.70Chapter B --- Original Fly Source Code --- p.71Bibliography --- p.7