20 research outputs found
Error Correction Capability of Column-Weight-Three LDPC Codes: Part II
The relation between the girth and the error correction capability of
column-weight-three LDPC codes is investigated. Specifically, it is shown that
the Gallager A algorithm can correct errors in iterations on a
Tanner graph of girth .Comment: 7 pages, 7 figures, submitted to IEEE Transactions on Information
Theory (July 2008
Two-Bit Bit Flipping Decoding of LDPC Codes
In this paper, we propose a new class of bit flipping algorithms for
low-density parity-check (LDPC) codes over the binary symmetric channel (BSC).
Compared to the regular (parallel or serial) bit flipping algorithms, the
proposed algorithms employ one additional bit at a variable node to represent
its "strength." The introduction of this additional bit increases the
guaranteed error correction capability by a factor of at least 2. An additional
bit can also be employed at a check node to capture information which is
beneficial to decoding. A framework for failure analysis of the proposed
algorithms is described. These algorithms outperform the Gallager A/B algorithm
and the min-sum algorithm at much lower complexity. Concatenation of two-bit
bit flipping algorithms show a potential to approach the performance of belief
propagation (BP) decoding in the error floor region, also at lower complexity.Comment: 6 pages. Submitted to IEEE International Symposium on Information
Theory 201
LDPC Codes Which Can Correct Three Errors Under Iterative Decoding
In this paper, we provide necessary and sufficient conditions for a
column-weight-three LDPC code to correct three errors when decoded using
Gallager A algorithm. We then provide a construction technique which results in
a code satisfying the above conditions. We also provide numerical assessment of
code performance via simulation results.Comment: 5 pages, 3 figures, submitted to IEEE Information Theory Workshop
(ITW), 200
Multilevel Decoders Surpassing Belief Propagation on the Binary Symmetric Channel
In this paper, we propose a new class of quantized message-passing decoders
for LDPC codes over the BSC. The messages take values (or levels) from a finite
set. The update rules do not mimic belief propagation but instead are derived
using the knowledge of trapping sets. We show that the update rules can be
derived to correct certain error patterns that are uncorrectable by algorithms
such as BP and min-sum. In some cases even with a small message set, these
decoders can guarantee correction of a higher number of errors than BP and
min-sum. We provide particularly good 3-bit decoders for 3-left-regular LDPC
codes. They significantly outperform the BP and min-sum decoders, but more
importantly, they achieve this at only a fraction of the complexity of the BP
and min-sum decoders.Comment: 5 pages, in Proc. of 2010 IEEE International Symposium on Information
Theory (ISIT
Instanton-based Techniques for Analysis and Reduction of Error Floors of LDPC Codes
We describe a family of instanton-based optimization methods developed
recently for the analysis of the error floors of low-density parity-check
(LDPC) codes. Instantons are the most probable configurations of the channel
noise which result in decoding failures. We show that the general idea and the
respective optimization technique are applicable broadly to a variety of
channels, discrete or continuous, and variety of sub-optimal decoders.
Specifically, we consider: iterative belief propagation (BP) decoders, Gallager
type decoders, and linear programming (LP) decoders performing over the
additive white Gaussian noise channel (AWGNC) and the binary symmetric channel
(BSC).
The instanton analysis suggests that the underlying topological structures of
the most probable instanton of the same code but different channels and
decoders are related to each other. Armed with this understanding of the
graphical structure of the instanton and its relation to the decoding failures,
we suggest a method to construct codes whose Tanner graphs are free of these
structures, and thus have less significant error floors.Comment: To appear in IEEE JSAC On Capacity Approaching Codes. 11 Pages and 6
Figure
A Practical Nonbinary Decoder for Low-Density Parity-Check Codes with Packet-Sized Symbols
This paper presents a practical decoder for regular low-density parity-check (LDPC) codes with flexible packet-sized symbols. The proposed hMP-VSD (Combined hard-decision message-passing with vector symbol decoding) is much less complex than the conventional VSD and has the same decoding performance. Regular LDPC codes with systematic encoding are selected for implementation. The channel is assumed to be the q-ary symmetric channel (q-SC). Different code lengths and column weights of LDPC codes are investigated. The results show that the codes with a column weight of 7 provide the best performance for hMP-VSD, while hMP works best with codes having a column weight of 5. With packet-sized symbols, even the rather short (60, 30) code structure has code lengths of 1,920 to 245,760 bits with symbol sizes of 32 to 4,096 bits. Both the decoder and its encoder were implemented on Raspberry-pi 4 model B boards and these results confirm that the computation time of hMP-VSD is 60% to 70% lower than that of VSD for pe in the range 0.05 to 0.1