3 research outputs found

    Energy efficient scheduling for hard real-time systems

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    Für moderne elektronische Systeme spielt der Energieverbrauch eine immer wichtigere Rolle. Geringer Stromverbrauch und lange Akkulaufzeit sind die wichtigsten Anforderungen bei der Entwicklung, um die Betriebskosten der Geräte zu reduzieren. Auf Systemebene gibt es zwei weit verbreitete Techniken, um den Energieverbrauch zu reduzieren: Dynamic Power Management (DPM) und Dynamic Voltage and Frequency Scaling (DVS). Beide Techniken sind in der Lage, den Trade-off zwischen Systemleistung und Stromverbrauch zu regulieren. Da beide Techniken den Energieverbrauch auf Kosten der Systemleistung reduzieren, sollten sie insbesondere in der Kombination mit Echtzeitsystemen mit Bedacht eingesetzt werden. Um den Energieverbrauch in Echtzeitsystemen zu reduzieren, beschäftigt sich diese Arbeit mit dem Problem der Energieverbrauchsoptimierung mit Hilfe einer kombinierten Anwendung von DPM und DVS. Hiermit wird insbesondere der Aufwand beim Zustandswechsel für DPM und DVS untersucht. Leider ist das betrachtete Optimierungsproblem NP-hart, sodass für seine Lösung keine effizienten Algorithmen existieren. Daher wird in dieser Dissertation ein heuristischer Suchalgorithmus entwickelt, der den Simulated Annealing Algorithmus um spezielle Regeln für die Selektion von Nachbarn erweitert. Darüber hinaus wird eine auf Regression basierte Technik zur Analyse des Verhaltens des vorgestellten Algorithmus erarbeitet. Ferner präsentiert diese Arbeit einen Ansatz zur Onlineausführung des vorgestellten Algorithmus. Dabei besteht die größte Herausforderung darin, dass der heuristische Algorithmus in der Ausführung des Echtzeitsystems integriert werden muss. Dadurch ist das System in der Lage, sich selbstständig an dynamische Veränderungen anzupassen. Noch wichtiger ist jedoch der geführte Nachweis, dass der Laufzeitaufwand der Onlineausführung gering ist.In modern electronic systems, especially in battery-driven devices, energy consumption has clearly become one of the most important design concerns. Low power consumption and long battery life are major development requirements and objectives to reduce system operation cost. From the system-level point of view, there are two widely applied energy saving techniques, Dynamic Power Management (DPM) and Dynamic Voltage and Frequency Scaling (DVS), which are able to adjust the trade-off between system performance and power consumption. Both techniques reduce system power consumption at the cost of performance loss, which is a crucial point in the context of hard real-time systems. To address energy optimization problem, this dissertation studies in detail the combined application of DPM and DVS on both single- and multi-core processor platforms, in particular with non-negligible state switching overhead. Unfortunately, the facing problem is proven to be NP-hard in the strong sense, which indicates non-existence of efficient algorithms. Thus, this work proposes a heuristic search algorithm by extending simulated annealing with neighbor selection guidelines using domain specific information. In addition, a regression based mechanism to predict algorithm run-time behavior is proposed, which in turn is used for quality estimation of a solution and derivation of an efficient termination criterion. Furthermore, this dissertation presents an approach, which is able to run the proposed algorithms in a completely online fashion. Hereby, the main challenge is to integrate the heuristic into the execution of real-time tasks, which is solved by mapping iterations of the algorithm to hyper periods of the task execution. In doing so, a system becomes self-adaptive to dynamic changes. More importantly, it can be shown that the run-time overhead of this approach is provably low.Tag der Verteidigung: 20.12.2013Paderborn, Univ., Diss., 201

    Energy-Efficient Scheduling for Real-Time Tasks in Uniprocessor and Homogeneous Multiprocessor Systems

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    With the advanced technology in VLSI circuit designs, many modern processors now provide dynamic voltage scaling (DVS) support. The lower the speed is, the lower the supply voltage requires, and the less the power consumes. This dissertation explores energy-efficient scheduling for hard real-time systems and the maximization of the system reward for real-time systems under a specified energy constraint on DVS processors. Distinct from many previous work, this dissertation aims at the provision of approximated solutions with worst-case guarantees. In addition to the worst-case analysis of the developed algorithms, extensive experiments were done to evaluate the effectiveness of the algorithms, compared to existing algorithms. The experimental results are very encouraging. When speed switching is not allowed in the middle of a job execution, a polynomial-time (1+epsilon)(1+epsilon)-approximation algorithm is presented to minimize the energy consumption of periodic real-time tasks in uniprocessor systems with a user-specified tolerable error epsilonepsilon. It provides trade-offs between the user's tolerable error and the runtime complexity, including the time complexity and the space complexity. When leakage power consumption is considered, we develop procrastination scheduling strategies to reduce the energy consumption by turning processors into the dormant mode. Approximation bounds are derived for rate-monotonic and earliest-deadline-first scheduling algorithms. When periodic real-time task executions are considered in homogeneous multiprocessor systems with ideal processors, we develop algorithms with resource augmentation on processor speeds. A 1.131.13-approximation algorithm is developed for systems with negligible leakage power consumption, and 22-approximation algorithms are developed for systems with non-negligible leakage power consumption. Energy-constrained scheduling is then explored with reward maximization in uniprocessor systems. When speed switching can be done at any time with an identical power consumption function, a greedy algorithm is proposed with a 0.50.5-approximation ratio. A dynamic programming approach is then proposed with a (1epsilon)(1-epsilon)-approximation ratio, where the running time is polynomial in frac1epsilonfrac{1}{epsilon} with a user-specified tolerable error epsilonepsilon to derived solutions. When tasks have different power consumption functions or voltage scaling could be done only at a task arrival or termination time, a frac{1}{3}$-approximation algorithm is developed based on linear programming.1 Introduction 1 1.1 Motivations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.1.1 Low-Power Designs . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.1.2 Real-Time Requirements and Scheduling Policies . . . . . . . . . . . . 4 1.2 Objectives and Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2.1 Energy-Efficient Scheduling . . . . . . . . . . . . . . . . . . . . . . 5 1.2.2 Energy-Constrained Scheduling . . . . . . . . . . . . . . . . . . . . . 7 1.3 Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Related Work 11 3 Uniprocessor Energy-Efficient Scheduling 19 3.1 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.2 A Fully Polynomial-Time Approximation Scheme . . . . . . . . . . . . . . . . . . . 24 3.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.4 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 4 Multiprocessor Energy-Efficient Scheduling 37 4.1 Problem Definitions and NP-Hardness . . . . . . . . . . . . . . . . . . . . . 39 4.1.1 Problem Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.1.2 Hardness of the Problems . . . . . . . . . . . . . . . . . . . . . . . 42 4.2 Multiprocessor Scheduling without Task Migration . . . . . . . . . . . . . . . 45 4.2.1 Multiprocessor Scheduling over Two Identical Processors . . . . . . . 46 4.2.2 Multiprocessor Scheduling over an Arbitrary Number of Processors . . 51 4.2.3 Multiprocessor Scheduling with Processor Speed Constraints . . . . . . 57 4.2.4 Extensions to Periodic Real-Time Tasks and Processors with Discrete Available Speeds . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 4.3 Multiprocessor Scheduling with Task Migration . . . . . . . . . . . . . . . . . 60 4.3.1 An Algorithm for Optimal Schedules for Negligible Task Migration Cost 61 4.3.2 An Approximation Algorithm for Systems with Non-Negligible Task Migration Cost . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 4.4 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 4.4.1 Workload Parameters and Performance Metrics . . . . . . . . . . . . . 67 4.4.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 68 4.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 5 Uniprocessor Leakage-Aware Energy-Efficient Scheduling 75 5.1 Problem Difinitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 5.2 Preliminary Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 5.2.1 Critical speeds . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 5.2.2 Minimization of the execution energy consumption . . . . . . . . . . . 80 5.3 Algorithms for Task Procrastination . . . . . . . . . . . . . . . . . . . . . . . 82 5.3.1 Procrastination scheduling algorithm: OSS . . . . . . . . . . . . . . . 83 5.3.2 Analysis of the Algorithm OSS . . . . . . . . . . . . . . . . . . . . . 85 5.3.3 Procrastination scheduling algorithm: VOSS . . . . . . . . . . . . . . 89 5.3.4 Remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 5.4 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93 5.5 Extensions to Dynamic-Priority Scheduling . . . . . . . . . . . . . . . . . . . 95 5.5.1 Minimization of the execution energy consumption . . . . . . . . . . . 96 5.5.2 Procrastination . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 5.6 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98 6 Multiprocessor Leakage-Aware Energy-Efficient Scheduling 101 6.1 Problem Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 6.2 Approximation Algorithm for Negligible Switching Overheads . . . . . . . . . 105 6.2.1 Results for the Power Consumption Function . . . . . . . . . . . . . . 105 6.2.2 An Approximation Algorithm . . . . . . . . . . . . . . . . . . . . . . 107 6.3 A Two-Phase Algorithm for Non-Negligible Switching Overheads . . . . . . . . . . 113 6.3.1 No dormant-mode consideration . . . . . . . . . . . . . . . . . . . . 113 6.3.2 Considerations of the dormant mode . . . . . . . . . . . . . . . . . . 117 6.4 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 6.4.1 Workload Parameters and Performance Metrics . . . . . . . . . . . . . 119 6.4.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 120 6.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 7 Uniprocessor Energy-Constrained Scheduling for Reward Maximization 125 7.1 Problem Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 7.2 The AREES Problem When All of the Tasks Have the Same Power Consumption Function 130 7.2.1 Energy Minimization for a Given Execution Index Selection . . . . . . 130 7.2.2 A 0.5-Approximation Algorithm . . . . . . . . . . . . . . . . . . . . 133 7.2.3 A Fully Polynomial-Time Approximation Scheme . . . . . . . . . . . 138 7.2.4 Remarks: the Mandatory Execution Part . . . . . . . . . . . . . . . . 141 7.3 (1/3)-Approximation Algorithms Based on Integer Programming . . . . . . . . . . 142 7.4 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148 7.4.1 Experimental Setups and Performance Metrics . . . . . . . . . . . . . 148 7.4.2 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . 149 7.5 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152 8 Concluding Remarks 153 8.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 8.2 Future Research Directions . . . . . . . . . . . . . . . . . . . . . . . . . . . 155 8.2.1 Heterogeneous Multiprocessor DVS Scheduling . . . . . . . . . . . . 155 8.2.2 I/O-Aware Energy-Efficient Scheduling . . . . . . . . . . . . . . . . 156 8.2.3 Temperature-Aware Scheduling . . . . . . . . . . . . . . . . . . . . . 156 8.2.4 Application-Oriented Real-Time Scheduling . . . . . . . . . . . . . . 157 Bibliography. . . . . . . . . . . . . 15
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