5 research outputs found

    Efficient Symmetry Reduction and the Use of State Symmetries for Symbolic Model Checking

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    One technique to reduce the state-space explosion problem in temporal logic model checking is symmetry reduction. The combination of symmetry reduction and symbolic model checking by using BDDs suffered a long time from the prohibitively large BDD for the orbit relation. Dynamic symmetry reduction calculates representatives of equivalence classes of states dynamically and thus avoids the construction of the orbit relation. In this paper, we present a new efficient model checking algorithm based on dynamic symmetry reduction. Our experiments show that the algorithm is very fast and allows the verification of larger systems. We additionally implemented the use of state symmetries for symbolic symmetry reduction. To our knowledge we are the first who investigated state symmetries in combination with BDD based symbolic model checking

    Performance analysis and optimization of asynchronous circuits

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    Journal ArticleAsynchronous/Self-timed circuits are beginning to attract renewed attention as promising means of dealing with the complexity of modern VLSI designs. However, there are very few analysis techniques or tools available for estimating the performance of asynchronous circuits. In this paper we adapt the theory of Generalized Timed Petri-nets (GTPN) for analyzing and comparing a wide variety of asynchronous circuits, ranging from purely control-oriented circuits such as cross-bar arbiters to large asynchronous systems with data dependent control such as asynchronous processors. Experiments with the GTPN analyzer are found to track the observed performance of actual asynchronous circuits, thereby offering empirical evidence towards the soundness of the modeling approach. Our main contribution is in demonstrating how a quantitative design methodology for asynchronous circuits can be developed based on Timed Petri-nets

    Symmetric and efficient synthesis

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    Since the formulation of the synthesis problem for reactive systems by Church in the 60s, research on synthesis has lead to both theoretical insights and practical approaches for automatically constructing systems from their specifications. While the first solution of the problem was given by Büchi as early as 1969, only very recently, focus has shifted towards identifying ways to exploit the structure in reactive system specifications in order to lift the scalability of synthesis to industrial-sized designs. The recent progress in synthesis not only lead to a renewed interest in the subject, but also shed light onto the downsides of current synthesis approaches. In the original formulation of the problem, the structure of the produced solutions was not a concern. Experiments with current synthesis approaches has however shown that the computed implementations are usually very hard to understand and have little of the structure that manually constructed implementations have. Furthermore, the scalability of current synthesis approaches is still deemed to be insufficient for many industrial application scenarios, which prevents the introduction of reactive synthesis technology into industrial design flows. In this thesis, we tackle both of these problems for reactive synthesis. To counter the insufficient structure in the solutions, we analyse the problem of symmetric synthesis. In this alternative synthesis problem, the aim is to compute a solution that consists of multiple copies of the same process such that the overall system satisfies the specification. Such systems have no centralised control units, and are considered to be more robust and easier to maintain. We characterise undecidable and decidable cases of the problem, and provide a synthesis algorithm for rotation-symmetric architectures, which capture many cases of practical relevance. To improve the scalability in synthesis, we start with a simple but scalable approach to reactive synthesis that has shown its principal applicability in the field, and extend its main idea both in terms of scope and usability. We enhance its expressivity in a way that allows to synthesise robust systems, and remove its limitation to specifications of a very special form. Both improvements yield theoretical insights into the synthesis problem: we characterise which specification classes can be supported in synthesis approaches that use parity games with a fixed number of colours as the underlying computation model, and examine the properties of universal very-weak automata, on which we base a synthesis workflow that combines ease of specification with a low complexity of the underlying game solving step. As a side-result, we also obtain the first procedure to translate a formula in linear-time temporal logic (LTL) to a computation tree logic (CTL) formula with only universal path quantifiers, whenever possible. The new results on symmetric and efficient reactive synthesis are complemented by an easily accessible introductory chapter to the field of reactive synthesis that can also be read in isolation.paddle apparatus with membrane holder were identified.Trotz der Vorzüge der Synthese reaktiver Systeme gegenüber der manuellen Konstruktion solcher Systeme ist Synthese noch nicht als Teil industrieller Vorgehensmodelle etabliert. Als Hauptgrund für diese Diskrepanz gilt allgemein, dass sowohl die Qualität der synthetisierten Systeme bei Anwendung bisheriger Methoden unzureichend ist, als auch die Skalierbarkeit aktueller Syntheseverfahren der Verbesserung bedarf. Diese Dissertation behandelt beide diese Probleme der Synthese reaktiver Systeme auf breiter Front. Zur Verbesserung der Qualität synthetisierter Systeme wird die Synthese von strukturierten Systemen betrachtet. Experimente mit aktuellen Syntheseverfahren haben gezeigt, dass die erzeugten Implementierungen oft schwer zu verstehen sind und anders als handgeschriebene Implementierungen kaum Struktur haben. Abhilfe verschafft die Beschränkung auf die Erzeugung symmetrischer Systeme, die aus mehreren Kopien des selben Prozesses bestehen, so dass das Gesamtsystem die Spezifikation erfüllt. Solche Systeme haben keine zentrale Koordinationskomponente und werden allgemein als robuster und einfacher zu warten eingestuft. In dieser Dissertation werden entscheidbare und unentscheidbare Fälle des symmetrischen Syntheseproblems identifiziert und ein Synthesealgorithmus für rotationssymmetrische Systeme beschrieben. Diese Systemklasse deckt viele praktisch relevante Architekturen ab. Um das Problem der mangelnden Skalierbarkeit anzugehen, wird die Hauptidee des Generalised Reactivity(1) Syntheseansatzes, welcher seine praktische Anwendbarkeit bereits unter Beweis gestellt hat, aufgegriffen und sowohl bezüglich der Expressivität als auch der Benutzbarkeit vervollständigt. Die Erweiterung der Expressivität ermöglicht es, den resultierenden Ansatz für die Synthese robuster Systeme zu nutzen, während die Benutzbarkeit für industrielle Anwendungen durch die Aufhebung der Beschränkung, dass die Spezifikation eine sehr spezielle Form haben muss, erreicht wird. Beide Erweiterungen geben Einsicht in die Theorie der Synthese: Zum einen wird die Klasse der Spezifikationen, die in Syntheseansätzen verwendet werden können, die auf dem Lösen von Paritätsspielen mit einer vordefinierten Anzahl von Farben basieren, charakterisiert. Zum anderen wird Einsicht in die Eigenschaften universeller sehr schwacher Automaten gegeben. Ein Nebenprodukt der neuen Syntheseverfahren ist die erste Prozedur, um einen Ausdruck in linear-time temporal logic (LTL) in computation tree logic mit universellen Pfadquantoren (ACTL) zu übersetzen, wann immer dies möglich ist. Die Resultate zur symmetrischen und effizienten reaktiven Synthese werden von einer didaktisch aufbereiteten Einführung in das Gebiet der reaktiven Synthese begleitet, welche auch unabhängig von den übrigen Teilen der Dissertation gelesen werden kann

    Efficient Verification of Symmetric Concurrent Systems

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    Previously, we proposed a reduction technique [ID93] based on symmetries to alleviate the state explosion problem in automatic verification of concurrent systems. This paper describes the results of testing the technique on a wide range of algorithms and protocols, including realistic multiprocessor synchronization algorithms and cache coherence protocols. Memory requirements were reduced by amounts ranging from 83% to over 99%, and time requirements were often reduced as well. We also consider the effectiveness of the technique on different types of symmetries, such as symmetries in identical system components and symmetries in data values
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