Set-based approach to passenger aircraft family design

Presented is a method for the design of passenger aircraft families. Existing point-based methods found in the literature employ sequential approaches in which a single design solution is selected early and is then iteratively modified until all requirements are satisfied. The challenge with such approaches is that the design is driven toward a solution that, although promising to the optimizer, may be infeasible due to factors not considered by the models. The proposed method generates multiple solutions at the outset. Then, the infeasible solutions are discarded gradually through constraint satisfaction and set intersection. The method has been evaluated through a notional example of a three-member aircraft family design. The conclusion is that point-based design is still seen as preferable for incremental (conventional) designs based on a wealth of validated empirical methods, whereas the proposed approach, although resource-intensive, is seen as more suited to innovative designs

Progressive Neural Architecture Search

We propose a new method for learning the structure of convolutional neural networks (CNNs) that is more efficient than recent state-of-the-art methods based on reinforcement learning and evolutionary algorithms. Our approach uses a sequential model-based optimization (SMBO) strategy, in which we search for structures in order of increasing complexity, while simultaneously learning a surrogate model to guide the search through structure space. Direct comparison under the same search space shows that our method is up to 5 times more efficient than the RL method of Zoph et al. (2018) in terms of number of models evaluated, and 8 times faster in terms of total compute. The structures we discover in this way achieve state of the art classification accuracies on CIFAR-10 and ImageNet.Comment: To appear in ECCV 2018 as oral. The code and checkpoint for PNASNet-5 trained on ImageNet (both Mobile and Large) can now be downloaded from https://github.com/tensorflow/models/tree/master/research/slim#Pretrained. Also see https://github.com/chenxi116/PNASNet.TF for refactored and simplified TensorFlow code; see https://github.com/chenxi116/PNASNet.pytorch for exact conversion to PyTorc

Assessing hyper parameter optimization and speedup for convolutional neural networks

The increased processing power of graphical processing units (GPUs) and the availability of large image datasets has fostered a renewed interest in extracting semantic information from images. Promising results for complex image categorization problems have been achieved using deep learning, with neural networks comprised of many layers. Convolutional neural networks (CNN) are one such architecture which provides more opportunities for image classification. Advances in CNN enable the development of training models using large labelled image datasets, but the hyper parameters need to be specified, which is challenging and complex due to the large number of parameters. A substantial amount of computational power and processing time is required to determine the optimal hyper parameters to define a model yielding good results. This article provides a survey of the hyper parameter search and optimization methods for CNN architectures

Far-Term Exploration of Advanced Single-Aisle Subsonic Transport Aircraft Concepts

Far-term single-aisle class aircraft concepts for potential entry-into-service of 2045 were investigated using an Interactive Reconfigurable Matrix of Alternatives (IRMA) approach. The configurations identified through this design space exploration were then distilled into three advanced aircraft concepts best characterizing the prominent features identified through the IRMA exploration. These three aircraft concepts were then configured and sized for a 150-passenger capacity and a 3,500 nautical mile design mission. Mission block fuel burn was estimated and compared to a far-term conventional configuration baseline concept and a 2005 l. These comparisons suggest considerable potential improvements in fuel efficiency from the investigated advanced concepts

Video Processing Acceleration using Reconfigurable Logic and Graphics Processors

A vexing question is `which architecture will prevail as the core feature of the next state of the art video processing system?' This thesis examines the substitutive and collaborative use of the two alternatives of the reconfigurable logic and graphics processor architectures. A structured approach to executing architecture comparison is presented - this includes a proposed `Three Axes of Algorithm Characterisation' scheme and a formulation of perfor- mance drivers. The approach is an appealing platform for clearly defining the problem, assumptions and results of a comparison. In this work it is used to resolve the advanta- geous factors of the graphics processor and reconfigurable logic for video processing, and the conditions determining which one is superior. The comparison results prompt the exploration of the customisable options for the graphics processor architecture. To clearly define the architectural design space, the graphics processor is first identifed as part of a wider scope of homogeneous multi-processing element (HoMPE) architectures. A novel exploration tool is described which is suited to the investigation of the customisable op- tions of HoMPE architectures. The tool adopts a systematic exploration approach and a high-level parameterisable system model, and is used to explore pre- and post-fabrication customisable options for the graphics processor. A positive result of the exploration is the proposal of a reconfigurable engine for data access (REDA) to optimise graphics processor performance for video processing-specific memory access patterns. REDA demonstrates the viability of the use of reconfigurable logic as collaborative `glue logic' in the graphics processor architecture

Approach to an Affordable and Productive Space Transportation System

This paper describes an approach for creating space transportation architectures that are affordable, productive, and sustainable. The architectural scope includes both flight and ground system elements, and focuses on their compatibility to achieve a technical solution that is operationally productive, and also affordable throughout its life cycle. Previous papers by the authors and other members of the Space Propulsion Synergy Team (SPST) focused on space flight system engineering methods, along with operationally efficient propulsion system concepts and technologies. This paper follows up previous work by using a structured process to derive examples of conceptual architectures that integrate a number of advanced concepts and technologies. The examples are not intended to provide a near-term alternative architecture to displace current near-term design and development activity. Rather, the examples demonstrate an approach that promotes early investments in advanced system concept studies and trades (flight and ground), as well as in advanced technologies with the goal of enabling highly affordable, productive flight and ground space transportation systems

Microprocessor fault-tolerance via on-the-fly partial reconfiguration

This paper presents a novel approach to exploit FPGA dynamic partial reconfiguration to improve the fault tolerance of complex microprocessor-based systems, with no need to statically reserve area to host redundant components. The proposed method not only improves the survivability of the system by allowing the online replacement of defective key parts of the processor, but also provides performance graceful degradation by executing in software the tasks that were executed in hardware before a fault and the subsequent reconfiguration happened. The advantage of the proposed approach is that thanks to a hardware hypervisor, the CPU is totally unaware of the reconfiguration happening in real-time, and there's no dependency on the CPU to perform it. As proof of concept a design using this idea has been developed, using the LEON3 open-source processor, synthesized on a Virtex 4 FPG