513 research outputs found

    A Digital Neuromorphic Realization of the 2-D Wilson Neuron Model

    Get PDF
    This brief presents a piecewise linear approximation of the nonlinear Wilson (NW) neuron model for the realization of an efficient digital circuit implementation. The accuracy of the proposed piecewise Wilson (PW) model is examined by calculating time domain signal shaping errors. Furthermore, bifurcation analyses demonstrate that the approximation follows the same bifurcation pattern as the NW model. As a proof of concept, both models are hardware synthesized and implemented on field programmable gate arrays, demonstrating that the PW model has a range of neuronal behaviors similar to the NW model with considerably higher computational performance and a lower hardware overhead. This approach can be used in hardware-based large scale biological neural network simulations and behavioral studies. The mean normalized root mean square error and maximum absolute error of the PW model are 6.32% and 0.31%, respectively, as compared to the NW model

    SIMPEL: Circuit model for photonic spike processing laser neurons

    Get PDF
    We propose an equivalent circuit model for photonic spike processing laser neurons with an embedded saturable absorber---a simulation model for photonic excitable lasers (SIMPEL). We show that by mapping the laser neuron rate equations into a circuit model, SPICE analysis can be used as an efficient and accurate engine for numerical calculations, capable of generalization to a variety of different laser neuron types found in literature. The development of this model parallels the Hodgkin--Huxley model of neuron biophysics, a circuit framework which brought efficiency, modularity, and generalizability to the study of neural dynamics. We employ the model to study various signal-processing effects such as excitability with excitatory and inhibitory pulses, binary all-or-nothing response, and bistable dynamics.Comment: 16 pages, 7 figure

    Analytical Modeling of a Communication Channel Based on Subthreshold Stimulation of Neurobiological Networks

    Get PDF
    The emergence of wearable and implantable machines manufactured artificially or synthesized biologically opens up a new horizon for patient-centered health services such as medical treatment, health monitoring, and rehabilitation with minimized costs and maximized popularity when provided remotely via the Internet. In particular, a swarm of machines at the scale of a single cell down to the nanoscale can be deployed in the body by the non-invasive or minimally invasive operation (e.g., swallowing and injection respectively) to perform various tasks. However, an individual machine is only able to perform basic tasks so it needs to exchange data with the others and outside world through an efficient and reliable communication infrastructure to coordinate and aggregate their functionalities. We introduce in this thesis Neuronal Communication (NC) as a novel paradigm for utilizing the nervous system \emph{in vivo} as a communication medium to transmit artificial data across the body. NC features body-wide communication coverage while it demands zero investment cost on the infrastructure, does not rely on any external energy source, and exposes the body to zero electromagnetic radiation. n addition, unlike many conventional body area networking techniques, NC is able to provide communication among manufactured electronic machines and biologically engineered ones at the same time. We provide a detailed discussion of the theoretical and practical aspects of designing and implementing distinct paradigms of NC. We also discuss NC future perspectives and open challenges. Adviser: Massimiliano Pierobo

    A Survey of Spiking Neural Network Accelerator on FPGA

    Full text link
    Due to the ability to implement customized topology, FPGA is increasingly used to deploy SNNs in both embedded and high-performance applications. In this paper, we survey state-of-the-art SNN implementations and their applications on FPGA. We collect the recent widely-used spiking neuron models, network structures, and signal encoding formats, followed by the enumeration of related hardware design schemes for FPGA-based SNN implementations. Compared with the previous surveys, this manuscript enumerates the application instances that applied the above-mentioned technical schemes in recent research. Based on that, we discuss the actual acceleration potential of implementing SNN on FPGA. According to our above discussion, the upcoming trends are discussed in this paper and give a guideline for further advancement in related subjects

    Hardware Implementations of Spiking Neural Networks and Artificially Intelligent Systems

    Get PDF
    Artificial spiking neural networks are gaining increasing prominence due to their potential advantages over traditional, time-static artificial neural networks. Custom hardware implementations of spiking neural networks present many advantages over other implementation mediums. Two main topics are the focus of this work. Firstly, digital hardware implementations of spiking neurons and neuromorphic hardware are explored and presented. These implementations include novel implementations for lowered digital hardware requirements and reduced power consumption. The second section of this work proposes a novel method for selectively adding sparsity to a spiking neural network based on training set images for pattern recognition applications, thereby greatly reducing the inference time required in a digital hardware implementation

    The Roadmap to Realize Memristive Three-Dimensional Neuromorphic Computing System

    Get PDF
    Neuromorphic computing, an emerging non-von Neumann computing mimicking the physical structure and signal processing technique of mammalian brains, potentially achieves the same level of computing and power efficiencies of mammalian brains. This chapter will discuss the state-of-the-art research trend on neuromorphic computing with memristors as electronic synapses. Furthermore, a novel three-dimensional (3D) neuromorphic computing architecture combining memristor and monolithic 3D integration technology would be introduced; such computing architecture has capabilities to reduce the system power consumption, provide high connectivity, resolve the routing congestion issues, and offer the massively parallel data processing. Moreover, the design methodology of applying the capacitance formed by the through-silicon vias (TSVs) to generate a membrane potential in 3D neuromorphic computing system would be discussed in this chapter
    • …
    corecore