Design of a wideband variable gain amplifier

Synteettisapertuurinen tutka (SAR) on hyvin tunnettu tekniikka maanpinnan kuvantamiseen. Tässä diplomityössä on suunniteltu laajakaistainen säädettävä vahvistin, jota voidaan käyttää SAR:in suorasekoitusvastaanottimessa (DCR). Ensin näytetään kuinka tärkeät muuttujat, kuten esimerkiksi VGA:n vahvistus, kaistanleveys ja kohina, saadaan määritettyä vastaanottimen kokonaisvaatimuksista. Seuraavaksi esitetään yleisesti suunnittelutapa VGA:lle, jossa tunnistetaan VGA:n tärkeimmät suunnittelumoduulit. Laajakaistaiset asteet, joita voidaan käyttää VGA:n suunnittelussa, esitellään lyhyesti, kuten myös tekniikoita, joilla siirrosjännite saadaan kompensoitua. Seuraavaksi esitellään yksityiskohtaisesti kuinka VGA suunnitellaan. Työssä esitetään piensignaali- ja kohina-analyysit VGA:n vahvistusasteille kuten myös simulaatiotulokset. VGA on suunniteltu ja valmistettu 0.13 µm CMOS prosessilla. Piirikuvion jälkeiset simulaatiot on myös esitetty ja ne todentavat lopullisen piirikuvion toimivuutta. Lopuksi esitetään VGA:n mittaustulokset, jotka näyttävät, että halutut vahvistus ja kaistanleveys on saavutettu. Mikropiirin digitaalisen ohjauksen epätasaisesta toimivuudesta johtuen, VGA:n taajuusvasteessa näkyi vahvistuksen piikittämistä. VGA:n tulon kohinatiheyden mittaustulokset eri vahvistusasetuksilla on myös esitetty ja ne vastaavat hyvin simuloituja arvoja. Tulon 1 dB:n kompressiopiste ja tulon kolmannen kertaluvun keskinäismodulaatiosärön leikkauspiste on myös annettu VGA:lle. Yleisesti ottaen VGA:n toimintaa voidaan pitää onnistuneena SAR:ssa käytettävälle suorasekoitusvastaanottimelle.Synthetic Aperture Radar (SAR) is a well known technique for imaging the earth's surface. This thesis presents a wideband variable gain amplifier which can be used in the direct conversion receiver (DCR) for SAR. The thesis first introduces how to extract the important parameters i.e. gain, bandwidth and noise of the VGA from the overall receiver requirements. Next, a general design philosophy for the VGA is presented which identifies the main design modules in the amplifier. Also, a brief introduction to wideband stages and DC-offset compensation techniques is presented. Then a detailed explanation of the VGA design is given. Small-signal and noise analyses are presented for the VGA gain stages along with their simulation results. VGA post-layout simulation results are also shown to verify the functionality of the final layout drawn using 0.13 µm CMOS. At the end, measurement results for the VGA are given which show that the VGA achieved the desired gain and bandwidth. However, due to irregular operation of the digital control for the chip, the frequency response of the VGA showed gain peaking. The measured input noise density of the VGA at different gain settings is also given and it matched well with the simulated value. Moreover, the input 1 dB compression point and the third order input intercept point results for the VGA are also given. The overall operation of VGA was deemed satisfactory for the direct conversion receiver for SAR

Continuous-time low-pass filters for integrated wideband radio receivers

This thesis concentrates on the design and implementation of analog baseband continuous-time low-pass filters for integrated wideband radio receivers. A total of five experimental analog baseband low-pass filter circuits were designed and implemented as a part of five single-chip radio receivers in this work. After the motivation for the research work presented in this thesis has been introduced, an overview of analog baseband filters in radio receivers is given first. In addition, a review of the three receiver architectures and the three wireless applications that are adopted in the experimental work of this thesis is presented. The relationship between the integrator non-idealities and integrator Q-factor, as well as the effect of the integrator Q-factor on the filter frequency response, are thoroughly studied on the basis of a literature review. The theoretical study that is provided is essential for the gm-C filter synthesis with non-ideal lossy integrators that is presented after the introduction of different techniques to realize integrator-based continuous-time low-pass filters. The filter design approach proposed for gm-C filters is original work and one of the main points in this thesis, in addition to the experimental IC implementations. Two evolution versions of fourth-order 10-MHz opamp-RC low-pass filters designed and implemented for two multicarrier WCDMA base-station receivers in a 0.25-µm SiGe BiCMOS technology are presented, along with the experimental results of both the low-pass filters and the corresponding radio receivers. The circuit techniques that were used in the three gm-C filter implementations of this work are described and a common-mode induced even-order distortion in a pseudo-differential filter is analyzed. Two evolution versions of fifth-order 240-MHz gm-C low-pass filters that were designed and implemented for two single-chip WiMedia UWB direct-conversion receivers in a standard 0.13-µm and 65-nm CMOS technology, respectively, are presented, along with the experimental results of both the low-pass filters and the second receiver version. The second UWB filter design was also embedded with an ADC into the baseband of a 60-GHz 65-nm CMOS radio receiver. In addition, a third-order 1-GHz gm-C low-pass filter was designed, rather as a test structure, for the same receiver. The experimental results of the receiver and the third gm-C filter implementation are presented