Design of Fully-Integrated High-Resolution Radars in CMOS and BiCMOS Technologies

The RADAR, acronym that stands for RAdio Detection And ranging, is a device that uses electromagnetic waves to detect the presence and the distance of an illuminated target. The idea of such a system was presented in the early 1900s to determine the presence of ships. Later on, with the approach of World War II, the radar gained the interest of the army who decided to use it for defense purposes, in order to detect the presence, the distance and the speed of ships, planes and even tanks. Nowadays, the use of similar systems is extended outside the military area. Common applications span from weather surveillance to Earth composition mapping and from flight control to vehicle speed monitoring. Moreover, the introduction of new ultrawideband (UWB) technologies makes it possible to perform radar imaging which can be successfully used in the automotive or medical field. The existence of a plenty of known applications is the reason behind the choice of the topic of this thesis, which is the design of fully-integrated high-resolution radars. The first part of this work gives a brief introduction on high resolution radars and describes its working principle in a mathematical way. Then it gives a comparison between the existing radar types and motivates the choice of an integrated solution instead of a discrete one. The second part concerns the analysis and design of two CMOS high-resolution radar prototypes tailored for the early detection of the breast cancer. This part begins with an explanation of the motivations behind this project. Then it gives a thorough system analysis which indicates the best radar architecture in presence of impairments and dictates all the electrical system specifications. Afterwards, it describes in depth each block of the transceivers with particular emphasis on the local oscillator (LO) generation system which is the most critical block of the designs. Finally, the last section of this part presents the measurement results. In particular, it shows that the designed radar operates over 3 octaves from 2 to 16GHz, has a conversion gain of 36dB, a flicker-noise-corner of 30Hz and a dynamic range of 107dB. These characteristics turn into a resolution of 3mm inside the body, more than enough to detect even the smallest tumor. The third and last part of this thesis focuses on the analysis and design of some important building blocks for phased-array radars, including phase shifter (PHS), true time delay (TTD) and power combiner. This part begins with an exhaustive introduction on phased array systems followed by a detailed description of each proposed lumped-element block. The main features of each block is the very low insertion loss, the wideband characteristic and the low area consumption. Finally, the major effects of circuit parasitics are described followed by simulation and measurement results

Additively Manufactured RF Components, Packaging, Modules, and Flexible Modular Phased Arrays Enabling Widespread Massively Scalable mmWave/5G Applications

The 5G era is here and with it comes many challenges, particularily facing the high frequency mmWave adoption. This is because of the cost to implement such dense networks is much greater due to the high propagation losses of signals that range from 26 GHz to 40 GHz. Therefore there needs to be a way to utilize a method of fabrication that can change with the various environments that 5G will be deployed in, be it dense urban areas or suburban sprawl. In this research, the focus is on making these RF components utilized for 5G at low cost and modular with a focus on additive manufacturing. Since additive manufacturing is a rapid prototyping technique, the technology can be quickly adjusted and altered to meet certain specifications with negligible overhead. Several areas of research will be explored. Firstly, various RF passive components such as additively manufactured antennas and couplers with a combination hybrid inkjet and 3D printing will be discussed. Passive components are critical for evaluating the process of additive manufacturing for high frequency operation. Secondly, various structures will be evaluated specifically for packaging mmWave ICs, including interconnects, smart packaging and encapsulants for use in single or multichip modules. Thirdly, various antenna fabrication techniques will be explored which enables fully integrated ICs with antennas, called System on Antenna (SoA) which utilizes both inkjet and 3D printing to combine antennas and ICs into modules. These modules, can then be built into arrays in a modular fashion, allowing for large or smaller arrays to be assembled on the fly. Finally, a method of calibrating the arrays is introduced, utilizing inkjet printed sensors. This allows the sensor to actively detect bends and deformations in the array and restore optimal antenna array performance. Built for flexible phased arrays, the sensor is designed for implementation for ubiquitous use, meaning that its can be placed on any surface, which enables widespread use of 5G technologies.Ph.D

Efficient and Linear CMOS Power Amplifier and Front-end Design for Broadband Fully-Integrated 28-GHz 5G Phased Arrays

Demand for data traffic on mobile networks is growing exponentially with time and on a global scale. The emerging fifth-generation (5G) wireless standard is being developed with millimeter-wave (mm-Wave) links as a key technological enabler to address this growth by a 2020 time frame. The wireless industry is currently racing to deploy mm-Wave mobile services, especially in the 28-GHz band. Previous widely-held perceptions of fundamental propagation limitations were overcome using phased arrays. Equally important for success of 5G is the development of low-power, broadband user equipment (UE) radios in commercial-grade technologies. This dissertation demonstrates design methodologies and circuit techniques to tackle the critical challenge of key phased array front-end circuits in low-cost complementary metal oxide semiconductor (CMOS) technology. Two power amplifier (PA) proof-of-concept prototypes are implemented in deeply scaled 28- nm and 40-nm CMOS processes, demonstrating state-of-the-art linearity and efficiency for extremely broadband communication signals. Subsequently, the 40 nm PA design is successfully embedded into a low-power fully-integrated transmit-receive front-end module. The 28 nm PA prototype in this dissertation is the first reported linear, bulk CMOS PA targeting low-power 5G mobile UE integrated phased array transceivers. An optimization methodology is presented to maximizing power added efficiency (PAE) in the PA output stage at a desired error vector magnitude (EVM) and range to address challenging 5G uplink requirements. Then, a source degeneration inductor in the optimized output stage is shown to further enable its embedding into a two-stage transformer-coupled PA. The inductor helps by broadening inter-stage impedance matching bandwidth, and helping to reduce distortion. Designed and fabricated in 1P7M 28 nm bulk CMOS and using a 1 V supply, the PA achieves +4.2 dBm/9% measured Pout/PAE at −25 dBc EVM for a 250 MHz-wide, 64-QAM orthogonal frequency division multiplexing (OFDM) signal with 9.6 dB peak-to-average power ratio (PAPR). The PA also achieves 35.5%/10% PAE for continuous wave signals at saturation/9.6dB back-off from saturation. To the best of the author’s knowledge, these are the highest measured PAE values among published K- and K a-band CMOS PAs to date. To drastically extend the communication bandwidth in 28 GHz-band UE devices, and to explore the potential of CMOS technology for more demanding access point (AP) devices, the second PA is demonstrated in a 40 nm process. This design supports a signal radio frequency bandwidth (RFBW) >3× the state-of-the-art without degrading output power (i.e. range), PAE (i.e. battery life), or EVM (i.e. amplifier fidelity). The three-stage PA uses higher-order, dual-resonance transformer matching networks with bandwidths optimized for wideband linearity. Digital gain control of 9 dB range is integrated for phased array operation. The gain control is a needed functionality, but it is largely absent from reported high-performance mm-Wave PAs in the literature. The PA is fabricated in a 1P6M 40 nm CMOS LP technology with 1.1 V supply, and achieves Pout/PAE of +6.7 dBm/11% for an 8×100 MHz carrier aggregation 64-QAM OFDM signal with 9.7 dB PAPR. This PA therefore is the first to demonstrate the viability of CMOS technology to address even the very challenging 5G AP/downlink signal bandwidth requirement. Finally, leveraging the developed PA design methodologies and circuits, a low power transmit-receive phased array front-end module is fully integrated in 40 nm technology. In transmit-mode, the front-end maintains the excellent performance of the 40 nm PA: achieving +5.5 dBm/9% for the same 8×100 MHz carrier aggregation signal above. In receive-mode, a 5.5 dB noise figure (NF) and a minimum third-order input intercept point (IIP₃) of −13 dBm are achieved. The performance of the implemented CMOS frontend is comparable to state-of-the-art publications and commercial products that were very recently developed in silicon germanium (SiGe) technologies for 5G communication

Design of a Phase and Amplitude Detector for a wideband phased array system in SiGe BiCMOS technology

Questo lavoro ha come obiettivo la progettazione di un rilevatore di fase ed ampiezza integrato a banda larga (4-12GHz), da utilizzare come architettura di test on-chip per moduli di trasmissione-ricezione, nell'ambito dei sistemi phased array. Il dispositivo ha la struttura di un direct conversion receiver, e i risultati di simulazione evidenziano la possibilità di effettuare misure accurate con un errore di ampiezza massimo di 0.5dB, ed un errore di fase inferiore a 3°

Solid-state microwave heating for biomedical applications

The research conducted in this thesis aims to develop an efficient microwave delivery system employing miniature resonant microwave cavities, targeted at compact, flexible and ideally field-deployable microwave-assisted diagnostic healthcare applications. The system comprises a power amplifier as a solid-state microwave source and a load - as a single mode cavity resonator to hold the sample. The compactness of the practical microwave delivery system relies on the direct integration of the sample-holding cavity resonator to the power amplifier and inclusion of the built-in directional coupler for power measurements. The solid state power transistors used in this research (10W-LDMOS, 10W-GaN) were provided by the sponsoring company NXP Inc. In practical microwave delivery applications, the impedance environment of the cavity resonators change significantly, and this thesis shows how this can be systematically utilized to present the optimal loading conditions to the transistor by simply designing the series delay lines. This load transfer technique, which critically can be achieved without employing bulky, lossy and physically larger output matching networks, allows high performance of the power amplifier to be achieved through waveform engineering at the intrinsic plane of the transistor. Starting with the impedance observation of a rectangular cavity, using only series delay lines allowed the practical demonstration of the high power and high efficiency fully integrated inverse class-F (F-1) power amplifier. Temperature is an important factor in a microwave heating and delivery system as it changes the impedance environment of the cavity resonator. This natural change in both cavity and sample temperature can be accommodated through simplified series matching lines and the microwave heating system capable of working over substantial bandwidth was again practically demonstrated. The inclusion of the coupler maintained the compactness of the system. In the practical situations envisaged, the microwave delivery system needs to accommodate natural variation between sample volumes and consistencies for heating. The experimental work considered the heating of different sample volumes ii of water, and characterizing the change in the natural impedance environment of the cavity as a result. It was shown how the natural impedance variation can not only be accommodated, but also exploited, allowing ‘continuous’, high-efficiency performance to be achieved while processing a wide range of sample volumes. Specifically, using only transistor package parasitic, the impedance of the cavity itself together with a single series microstrip transmission line allows a continuous class-F-1 mode loading condition to be identified. Through different experiments, the microwave delivery systems with high-performance are demonstrated which are compact, flexible and efficient over operational bandwidth of the cavity resonators

Integrated radio frequency synthetizers for wireless applications

This thesis consists of six publications and an overview of the research topic, which is also a summary of the work. The research described in this thesis concentrates on the design of phase-locked loop radio frequency synthesizers for wireless applications. In particular, the focus is on the implementation of the prescaler, the phase detector, and the chargepump. This work reviews the requirements set for the frequency synthesizer by the wireless standards, and how these requirements are derived from the system specifications. These requirements apply to both integer-N and fractional-N synthesizers. The work also introduces the special considerations related to the design of fractional-N phase-locked loops. Finally, implementation alternatives for the different building blocks of the synthesizer are reviewed. The presented work introduces new topologies for the phase detector and the chargepump, and improved topologies for high speed CMOS prescalers. The experimental results show that the presented topologies can be successfully used in both integer-N and fractional-N synthesizers with state-of-the-art performance. The last part of this work discusses the additional considerations that surface when the synthesizer is integrated into a larger system chip. It is shown experimentally that the synthesizer can be successfully integrated into a complex transceiver IC without sacrificing the performance of the synthesizer or the transceiver.reviewe

Analysis and Design of Reflectarray Antennas for Radar System Applications

In recent years reflectarray has received more and more attention and it has been considered as a suitable candidate to replace the traditional reflectors due to its high-gain, low profile and low cost features. Reflectarray also eliminates the lossy feed network and costly transmitting and receiving modules when comparing with phased array antenna. It is desired to implement these functionalities with simple and effective techniques. Narrow bandwidth is the main issue which restricts the applications of the microstrip antennas, including the microstrip reflectarray. A broadband singlelayer reflectarray is introduced as the solutions to the issue of narrow bandwidth. A combination of two types of element configurations, including (i) ring elements and (ii) circular patch elements with ring boundary, enlarges the reflection phase range to more than 360◦ and thus enables the broadband operation of reflectarray. Blockage effect is another issue with the center-fed reflectarray. Certain obstacles, such as the feed horn, subreflector, and their supports, exist in reflectarray antennas. When these obstacles are in front of the reflectarray, the reflected wave is blocked, and the feed’s absorption also weakens the reflected power. An accurate prediction of this blockage effect in reflectarray design is essential. Five modeling schemes to account for the blockage effects in a reflectarray are described and also compared in terms of simulation time and consumed computing resource. In addition, another reflectarray with mainbeam direction steered 18◦ off broadside is also introduced to mitigate the blockage effect. Low cross-polarization performance is required for some reflectarray applications. For example, in dual-polarized weather radar the precipitation detection relies on complete isolation of orthogonal components of the fields, and thus negligible levels of cross-polarized radiation along the beam axis need to be maintained. A reflectarray design with suppressed cross-polarization is introduced in this dissertation. The directions of the surface currents can be changed by cutting gaps on the double-ring elements, so that the co-polar components of the surface currents enhance each other while the cross-polar components cancel each other, and thus a low cross-polarization level can be achieved. An X/Ku dual-band microstrip reflectarray with cosecant squared shaped beams has also been developed. The two operation frequency bands, 10 GHz and 15 GHz, are very close to each other. Thus the radiation interference between the two bands is taken into consideration and design is optimized to suppress the interference as much as possible. A dual-layer structure with cross-dipoles on the top layer and double-rings on the lower layer is adopted to suppress the interband couplings. Moreover, the dual-band elements are arranged in an interleaved manner in order to minimize element blockage. In addition, a phase-only synthesis technique is also introduced to obtain the two cosecant squared shaped beams for each operation frequency band. In summary, this dissertation presents a series of new research developments for reflectarray antennas. The results should have many applications for the modern wireless communications and radar systems