794 research outputs found
Design of Finite-Length Irregular Protograph Codes with Low Error Floors over the Binary-Input AWGN Channel Using Cyclic Liftings
We propose a technique to design finite-length irregular low-density
parity-check (LDPC) codes over the binary-input additive white Gaussian noise
(AWGN) channel with good performance in both the waterfall and the error floor
region. The design process starts from a protograph which embodies a desirable
degree distribution. This protograph is then lifted cyclically to a certain
block length of interest. The lift is designed carefully to satisfy a certain
approximate cycle extrinsic message degree (ACE) spectrum. The target ACE
spectrum is one with extremal properties, implying a good error floor
performance for the designed code. The proposed construction results in
quasi-cyclic codes which are attractive in practice due to simple encoder and
decoder implementation. Simulation results are provided to demonstrate the
effectiveness of the proposed construction in comparison with similar existing
constructions.Comment: Submitted to IEEE Trans. Communication
Design of Non-Binary Quasi-Cyclic LDPC Codes by ACE Optimization
An algorithm for constructing Tanner graphs of non-binary irregular
quasi-cyclic LDPC codes is introduced. It employs a new method for selection of
edge labels allowing control over the code's non-binary ACE spectrum and
resulting in low error-floor. The efficiency of the algorithm is demonstrated
by generating good codes of short to moderate length over small fields,
outperforming codes generated by the known methods.Comment: Accepted to 2013 IEEE Information Theory Worksho
Lowering the Error Floor of LDPC Codes Using Cyclic Liftings
Cyclic liftings are proposed to lower the error floor of low-density
parity-check (LDPC) codes. The liftings are designed to eliminate dominant
trapping sets of the base code by removing the short cycles which form the
trapping sets. We derive a necessary and sufficient condition for the cyclic
permutations assigned to the edges of a cycle of length in the
base graph such that the inverse image of in the lifted graph consists of
only cycles of length strictly larger than . The proposed method is
universal in the sense that it can be applied to any LDPC code over any channel
and for any iterative decoding algorithm. It also preserves important
properties of the base code such as degree distributions, encoder and decoder
structure, and in some cases, the code rate. The proposed method is applied to
both structured and random codes over the binary symmetric channel (BSC). The
error floor improves consistently by increasing the lifting degree, and the
results show significant improvements in the error floor compared to the base
code, a random code of the same degree distribution and block length, and a
random lifting of the same degree. Similar improvements are also observed when
the codes designed for the BSC are applied to the additive white Gaussian noise
(AWGN) channel
Low-Floor Tanner Codes via Hamming-Node or RSCC-Node Doping
We study the design of structured Tanner codes with low error-rate floors on the AWGN channel. The design technique involves the “doping” of standard LDPC (proto-)graphs, by which we mean Hamming or recursive systematic convolutional (RSC) code constraints are used together with single-parity-check (SPC) constraints to construct a code’s protograph. We show that the doping of a “good” graph with Hamming or RSC codes is a pragmatic approach that frequently results in a code with a good threshold and very low error-rate floor. We focus on low-rate Tanner codes, in part because the design of low-rate, low-floor LDPC codes is particularly difficult. Lastly, we perform a simple complexity analysis of our Tanner codes and examine the performance of lower-complexity, suboptimal Hamming-node decoders
Decoder-in-the-Loop: Genetic Optimization-based LDPC Code Design
LDPC code design tools typically rely on asymptotic code behavior and are
affected by an unavoidable performance degradation due to model imperfections
in the short length regime. We propose an LDPC code design scheme based on an
evolutionary algorithm, the Genetic Algorithm (GenAlg), implementing a
"decoder-in-the-loop" concept. It inherently takes into consideration the
channel, code length and the number of iterations while optimizing the
error-rate of the actual decoder hardware architecture. We construct short
length LDPC codes (i.e., the parity-check matrix) with error-rate performance
comparable to, or even outperforming that of well-designed standardized short
length LDPC codes over both AWGN and Rayleigh fading channels. Our proposed
algorithm can be used to design LDPC codes with special graph structures (e.g.,
accumulator-based codes) to facilitate the encoding step, or to satisfy any
other practical requirement. Moreover, GenAlg can be used to design LDPC codes
with the aim of reducing decoding latency and complexity, leading to coding
gains of up to dB and dB at BLER of for both AWGN and
Rayleigh fading channels, respectively, when compared to state-of-the-art short
LDPC codes. Also, we analyze what can be learned from the resulting codes and,
as such, the GenAlg particularly highlights design paradigms of short length
LDPC codes (e.g., codes with degree-1 variable nodes obtain very good results).Comment: in IEEE Access, 201
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