139,618 research outputs found
On systematic approaches for interpreted information transfer of inspection data from bridge models to structural analysis
In conjunction with the improved methods of monitoring damage and degradation processes, the interest in reliability assessment of reinforced concrete bridges is increasing in recent years. Automated imagebased inspections of the structural surface provide valuable data to extract quantitative information about deteriorations, such as crack patterns. However, the knowledge gain results from processing this information in a structural context, i.e. relating the damage artifacts to building components. This way, transformation to structural analysis is enabled. This approach sets two further requirements: availability of structural bridge information and a standardized storage for interoperability with subsequent analysis tools. Since the involved large datasets are only efficiently processed in an automated manner, the implementation of the complete workflow from damage and building data to structural analysis is targeted in this work. First, domain concepts are derived from the back-end tasks: structural analysis, damage modeling, and life-cycle assessment. The common interoperability format, the Industry Foundation Class (IFC), and processes in these domains are further assessed. The need for usercontrolled interpretation steps is identified and the developed prototype thus allows interaction at subsequent model stages. The latter has the advantage that interpretation steps can be individually separated into either a structural analysis or a damage information model or a combination of both. This approach to damage information processing from the perspective of structural analysis is then validated in different case studies
An Adaptive Design Methodology for Reduction of Product Development Risk
Embedded systems interaction with environment inherently complicates
understanding of requirements and their correct implementation. However,
product uncertainty is highest during early stages of development. Design
verification is an essential step in the development of any system, especially
for Embedded System. This paper introduces a novel adaptive design methodology,
which incorporates step-wise prototyping and verification. With each adaptive
step product-realization level is enhanced while decreasing the level of
product uncertainty, thereby reducing the overall costs. The back-bone of this
frame-work is the development of Domain Specific Operational (DOP) Model and
the associated Verification Instrumentation for Test and Evaluation, developed
based on the DOP model. Together they generate functionally valid test-sequence
for carrying out prototype evaluation. With the help of a case study 'Multimode
Detection Subsystem' the application of this method is sketched. The design
methodologies can be compared by defining and computing a generic performance
criterion like Average design-cycle Risk. For the case study, by computing
Average design-cycle Risk, it is shown that the adaptive method reduces the
product development risk for a small increase in the total design cycle time.Comment: 21 pages, 9 figure
From a Competition for Self-Driving Miniature Cars to a Standardized Experimental Platform: Concept, Models, Architecture, and Evaluation
Context: Competitions for self-driving cars facilitated the development and
research in the domain of autonomous vehicles towards potential solutions for
the future mobility.
Objective: Miniature vehicles can bridge the gap between simulation-based
evaluations of algorithms relying on simplified models, and those
time-consuming vehicle tests on real-scale proving grounds.
Method: This article combines findings from a systematic literature review,
an in-depth analysis of results and technical concepts from contestants in a
competition for self-driving miniature cars, and experiences of participating
in the 2013 competition for self-driving cars.
Results: A simulation-based development platform for real-scale vehicles has
been adapted to support the development of a self-driving miniature car.
Furthermore, a standardized platform was designed and realized to enable
research and experiments in the context of future mobility solutions.
Conclusion: A clear separation between algorithm conceptualization and
validation in a model-based simulation environment enabled efficient and
riskless experiments and validation. The design of a reusable, low-cost, and
energy-efficient hardware architecture utilizing a standardized
software/hardware interface enables experiments, which would otherwise require
resources like a large real-scale test track.Comment: 17 pages, 19 figues, 2 table
Model-driven design of context-aware applications
In many cases, in order to be effective, software applications need to allow sensitivity to context changes. This implies however additional complexity associated with the need for applications’ adaptability (being capable of capturing context, interpreting it and reacting on it). Hence, we envision 3 ‘musts’ that, in combination, are especially relevant to the design of context-aware applications. Firstly, at the business modeling level, it is considered crucial that the different possible context states can be properly captured and modeled, states that correspond to certain desirable behaviors. Secondly, it must be known what are the dependencies between the two, namely between states and behaviors. And finally, what is valid for application design in general, business needs are to be aligned to application solutions. In this work, we address the mentioned challenges, by approaching the notion of context and extending from this perspective a previously proposed business-software alignment approach. We illustrate our achieved results by means of a small example. It is expected that this research contribution will be useful as an additional result concerning the alignment between business modeling and software design
From FPGA to ASIC: A RISC-V processor experience
This work document a correct design flow using these tools in the Lagarto RISC- V Processor and the RTL design considerations that must be taken into account, to move from a design for FPGA to design for ASIC
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