Quantum walks: a comprehensive review

Quantum walks, the quantum mechanical counterpart of classical random walks, is an advanced tool for building quantum algorithms that has been recently shown to constitute a universal model of quantum computation. Quantum walks is now a solid field of research of quantum computation full of exciting open problems for physicists, computer scientists, mathematicians and engineers. In this paper we review theoretical advances on the foundations of both discrete- and continuous-time quantum walks, together with the role that randomness plays in quantum walks, the connections between the mathematical models of coined discrete quantum walks and continuous quantum walks, the quantumness of quantum walks, a summary of papers published on discrete quantum walks and entanglement as well as a succinct review of experimental proposals and realizations of discrete-time quantum walks. Furthermore, we have reviewed several algorithms based on both discrete- and continuous-time quantum walks as well as a most important result: the computational universality of both continuous- and discrete- time quantum walks.Comment: Paper accepted for publication in Quantum Information Processing Journa

Device and circuit-level models for carbon nanotube and graphene nanoribbon transistors

Metal-oxide semiconductor field-effect transistor (MOSFET) scaling throughout the years has enabled us to pack million of MOS transistors on a single chip to keep in pace with Moore’s Law. After forty years of advances in integrated circuit (IC) technology, the scaling of silicon (Si) MOSFET has entered the nanometer dimension with the introduction of 90 nm high volume manufacturing in 2004. The latest technological advancement has led to a low power, high-density and high-speed generation of processor. Nevertheless, the scaling of the Si MOSFET below 22 nm may soon meet its’ fundamental physical limitations. This threshold makes the possible use of novel devices and structures such as carbon nanotube field-effect transistors (CNTFETs) and graphene nanoribbon field-effect transistors (GNRFETs) for future nanoelectronics. The investigation explores the potential of these amazing carbon structures that exceed MOSFET capabilities in term of speed, scalability and power consumption. The research findings demonstrate the potential integration of carbon based technology into existing ICs. In particular, a simulation program with integrated circuit emphasis (SPICE) model for CNTFET and GNRFET in digital logic applications is presented. The device performance of these circuit models and their design layout are then compared to 45 nm and 90 nm MOSFET for benchmarking. It is revealed through the investigation that CNT and GNR channels can overcome the limitations imposed by Si channel length scaling and associated short channel effects while consuming smaller channel area at higher current density

Array stamping of carbon nanotubes and quantum transport in low-dimensional carbon nanotube-TMDC devices

In the first part of this thesis, we present a new approach to the fabrication of devices based on carbon nanotubes (CNTs) in the low disorder regime. Our fabrication method consists of growing CNTs on a transparent quartz chip and stamping them on an array of tens of devices. The quartz chip and the recipient chip are designed in such a way that during the stamping process the CNTs do not touch any substrate and stays suspended on the electrodes of the recipient devices. The parallel transfer of tens of CNTs highly increases the average number of usable devices per chip. The resulting CNT-based devices are characterized via transport measurements at different temperatures down to the milli-Kelvin regime. The separation of growth chip from the measurement chip allows one to freely choose the material for the electrodes, opening the way for the implementation of CNT-based devices with superconducting or ferromagnetic leads. It was suggested recently that Majorana Fermions should emerge in CNTs contacted with a thin superconductor which retains its superconducting gap in presence of large in-plane field. We demonstrate an all-dry technique for contacting CNTs with few-layer-thick flakes of niobium diselenide (NbSe2) as superconducting layered material of the family of the transition metal dichalcogenides. The choice of NbSe2 is motivated by its large critical in-plane magnetic field. We show that the NbSe2-to-CNT contact resistance is comparable to that observed for other methods. We discuss the temperature and magnetic field dependence of the quantum transport in our devices. Furthermore, we could observe long-range superconducting correlations in a few micrometer-long CNT which is encapsulated in stack of NbSe2 and hexagonal boron nitride. We show that a substantial supercurrent flows through the nanotube section underneath the NbSe2 crystal and through a two-micrometer long portion which is not in contact with it. As predicted for superconductors with a cross section in the nanometer range, the current-triggered collapse of superconductivity is mediated by resistance steps due phase slip center nucleation. The Ising superconductor NbSe2 is the ideal playground to examine the emergence of phase slip events. The exact nucleation position of phase slip lines in plain NbSe2 films is hard to predict and crucially depends on the individual sample. By patterning a one-dimensional constriction in NbSe2, the free energy barrier, which must be overcome to create a normal conducting region inside the superconducting 1D channel, will be sufficiently small. We demonstrate that as such fabricated nanowires still show superconducting features and that we can relate their origins to phase slip centers and lines