15,223 research outputs found

    Mapping RT-LOTOS specifications into Time Petri Nets

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    RT-LOTOS is a timed process algebra which enables compact and abstract specification of real-time systems. This paper proposes and illustrates a structural translation of RT-LOTOS terms into behaviorally equivalent (timed bisimilar) finite Time Petri nets. It is therefore possible to apply Time Petri nets verification techniques to the profit of RT-LOTOS. Our approach has been implemented in RTL2TPN, a prototype tool which takes as input an RT-LOTOS specification and outputs a TPN. The latter is verified using TINA, a TPN analyzer developed by LAAS-CNRS. The toolkit made of RTL2TPN and TINA has been positively benchmarked against previously developed RT-LOTOS verification tool

    Intermediate phase, network demixing, boson and floppy modes, and compositional trends in glass transition temperatures of binary AsxS1-x system

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    The structure of binary As_xS_{1-x} glasses is elucidated using modulated-DSC, Raman scattering, IR reflectance and molar volume experiments over a wide range (8%<x<41%) of compositions. We observe a reversibility window in the calorimetric experiments, which permits fixing the three elastic phases; flexible at x<22.5%, intermediate phase (IP) in the 22.5%<x<29.5% range, and stressed-rigid at x>29.5%. Raman scattering supported by first principles cluster calculations reveal existence of both pyramidal (PYR, As(S1/2)3) and quasi-tetrahedral(QT, S=As(S1/2)3) local structures. The QT unit concentrations show a global maximum in the IP, while the concentration of PYR units becomes comparable to those of QT units in the phase, suggesting that both these local structures contribute to the width of the IP. The IP centroid in the sulfides is significantly shifted to lower As content x than in corresponding selenides, a feature identified with excess chalcogen partially segregating from the backbone in the sulfides, but forming part of the backbone in selenides. These ideas are corroborated by the proportionately larger free volumes of sulfides than selenides, and the absence of chemical bond strength scaling of Tgs between As-sulfides and As-selenides. Low-frequency Raman modes increase in scattering strength linearly as As content x of glasses decreases from x = 20% to 8%, with a slope that is close to the floppy mode fraction in flexible glasses predicted by rigidity theory. These results show that floppy modes contribute to the excess vibrations observed at low frequency. In the intermediate and stressed rigid elastic phases low-frequency Raman modes persist and are identified as boson modes. Some consequences of the present findings on the optoelectronic properties of these glasses is commented upon.Comment: Accepted for PR

    Phase Stability and Segregation in Alloy 22 Base Metal and Weldments

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    The current design of the waste disposal containers relies heavily on encasement in a multi-layered container, featuring a corrosion barrier of Alloy 22, a Ni-Cr-Mo-W based alloy with excellent corrosion resistance over a wide range of conditions. The fundamental concern from the perspective of the Yucca Mountain Project, however, is the inherent uncertainty in the (very) long-term stability of the base metal and welds. Should the properties of the selected materials change over the long service life of the waste packages, it is conceivable that the desired performance characteristics (such as corrosion reistance) will become compromised, leading to premature failure of the system. To address this, we will study the phase stability and solute segregation characteristics of Alloy 22 base metal and welds. A better understanding of the underlying microstructural evolution tendencies, and their connections with corrosion behavior will (in turn) produce a higher confidence in the extrapolated behavior of the container materials over time periods that are not feasibly tested in a laboratory. Additionally, the knowledge gained here may potentially lead to cost savings through development of safe and realistic design constraints and model assumptions throughout the entire disposal system

    Genie: A Generator of Natural Language Semantic Parsers for Virtual Assistant Commands

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    To understand diverse natural language commands, virtual assistants today are trained with numerous labor-intensive, manually annotated sentences. This paper presents a methodology and the Genie toolkit that can handle new compound commands with significantly less manual effort. We advocate formalizing the capability of virtual assistants with a Virtual Assistant Programming Language (VAPL) and using a neural semantic parser to translate natural language into VAPL code. Genie needs only a small realistic set of input sentences for validating the neural model. Developers write templates to synthesize data; Genie uses crowdsourced paraphrases and data augmentation, along with the synthesized data, to train a semantic parser. We also propose design principles that make VAPL languages amenable to natural language translation. We apply these principles to revise ThingTalk, the language used by the Almond virtual assistant. We use Genie to build the first semantic parser that can support compound virtual assistants commands with unquoted free-form parameters. Genie achieves a 62% accuracy on realistic user inputs. We demonstrate Genie's generality by showing a 19% and 31% improvement over the previous state of the art on a music skill, aggregate functions, and access control.Comment: To appear in PLDI 201

    A low cost reconfigurable soft processor for multimedia applications: design synthesis and programming model

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    This paper presents an FPGA implementation of a low cost 8 bit reconfigurable processor core for media processing applications. The core is optimized to provide all basic arithmetic and logic functions required by the media processing and other domains, as well as to make it easily integrable into a 2D array. This paper presents an investigation of the feasibility of the core as a potential soft processing architecture for FPGA platforms. The core was synthesized on the entire Virtex FPGA family to evaluate its overall performance, scalability and portability. A special feature of the proposed architecture is its simple programming model which allows low level programming. Throughput results for popular benchmarks coded using the programming model and cycle accurate simulator are presented

    Progressive events in supervisory control and compositional verification

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    This paper investigates some limitations of the nonblocking property when used for supervisor synthesis in discrete event systems. It is shown that there are cases where synthesis with the nonblocking property gives undesired results. To address such cases, the paper introduces progressive events as a means to specify more precisely how a synthesised supervisor should complete its tasks. The nonblocking property is modified to take progressive events into account, and appropriate methods for verification and synthesis are proposed. Experiments show that progressive events can be used in the analysis of industrial-scale systems, and can expose issues that remain undetected by standard nonblocking verification
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