Variation-Aware Modeling and Design of Nanophotonic Interconnects

Optical interconnects have started to replace electrical interconnects in the communications between racks and circuit boards with potential benefits in bandwidth, delay, power efficiency, and crosstalk. Silicon photonics has emerged to be a highly promising enabling technology for the short-reach nanophotonic interconnects because it offers favorable CMOS compatibility and high integration level. The fast-growing complexity of photonic integrated circuit (PIC) and close electro-optical integration call for computer-aided design (CAD) for integrated photonics, and electronic-photonic design automation (EPDA) including accurate behavior models and efficient simulation methodologies for integrated electro-optical systems. Also, the nanophotonic devices are highly sensitive to fabrication process variation and thermal variation effects, which requires proper modeling, optimization, and management schemes. To address these problems, this thesis is dedicated to the following two tasks: (1) compact modeling and circuit-level simulation of nanophotonic interconnects, and (2) power-efficient management of the variation effects in nanophotonic interconnects.The first part of the thesis develops compact models for key components in nanophotonic interconnects including silicon microring modulators, diode lasers, electro-absorption modulators (EAM), photodetectors, etc. These compact models are developed based on their electrical and optical properties, and are then extensively validated by measurement data. The model parameters are extracted from common electrical and optical tests. Implemented in Verilog-A, the models are used in SPICE simulations of optical links, whose results again agree well with measurement data. The compact model library and the simulation methodology enable electro-optical co-simulations and optical device design explorations in the circuit-level.In the second part of the thesis, we propose modeling methods and power-efficient management schemes for the process and thermal variations in optical interconnects. The proposed adaptive tuning technique performs on-chip self-tests and adaptively allocates just enough power for link operations. The technique saves significant amount of power compared to worst-case based conservative designs, and scales well w.r.t. variations and network size. We also design power-efficient pairing algorithms for microring-based optical interconnects. Our algorithms optimally mix-and-match microring-based devices to minimize the power consumption for tuning. The algorithms are tested on both measured and synthetic data sets, demonstrating promising results of power reduction and scalability for handling a large number of devices. Lastly, we decompose and analyze wafer-scale spatial patterns of process variations in microring modulators. We further investigate the correlations between the spatial patterns and fabrication process steps, which is valuable for understanding process variation sources and improving fabrication processes for uniformity

Open-access silicon photonics: current status and emerging initiatives

Silicon photonics is widely acknowledged as a game-changing technology driven by the needs of datacom and telecom. Silicon photonics builds on highly capital-intensive manufacturing infrastructure, and mature open-access silicon photonics platforms are translating the technology from research fabs to industrial manufacturing levels. To meet the current market demands for silicon photonics manufacturing, a variety of open-access platforms is offered by CMOS pilot lines, R&D institutes, and commercial foundries. This paper presents an overview of existing and upcoming commercial and noncommercial open-access silicon photonics technology platforms. We also discuss the diversity in these open-access platforms and their key differentiators

Integrated Photonics and Application-Specific Design on a Massive Open Online Course Platform

Silicon-based photonics is mobilizing into a manufacturing industry with specialized integrated circuit design requirements for applications in low power cloud computing, high speed wireless, smart sensing, and augmented imaging. The AIM Photonics Manufacturing USA Institute, which operates the world’s most advanced 300mm semiconductor research fab, has co-developed a Process Design Kit (PDK) in fabless circuit design for these expanding digital and analog applications; however, there currently isn’t available an in-depth curriculum to train engineers (academia, industry) in the AIM PDK process and Electronic Photonic Design Automation (EPDA) software. AIM Photonics Academy, an education initiative of AIM Photonics based at MIT, has collaborated with faculty to create three online MOOC edX courses that (1) introduce integrated photonics devices, and applications performance needs and metrics; and (2) train into the AIM PDK and specialized EPDA tools in a six week design project to lay out an application-specific photonic transceiver. The courses are structured around asynchronous video lectures and exploratory design problems that involve Python and Matlab-based first-principles calculations (systems modeling) or advanced EPDA tools (circuit design and layout). The online MOOC courses can optionally form a tandem blended learning component with two AIM Photonics Academy on-site training programs: the annual AIM Summer Academy one-week intensive program (held every July at MIT), or a photonic integrated circuit testing workshop (the first workshop is planned for fall 2019). These courses are a cornerstone effort at AIM to found and support a specialized cohort community of future integrated photonics designers

Graphene-based wireless agile interconnects for massive heterogeneous multi-chip processors

The main design principles in computer architecture have recently shifted from a monolithic scaling-driven approach to the development of heterogeneous architectures that tightly co-integrate multiple specialized processor and memory chiplets. In such data-hungry multi-chip architectures, current Networks-in-Package (NiPs) may not be enough to cater to their heterogeneous and fast-changing communication demands. This position article makes the case for wireless in-package networking as the enabler of efficient and versatile wired-wireless interconnect fabrics for massive heterogeneous processors. To that end, the use of graphene-based antennas and transceivers with unique frequency-beam reconfigurability in the terahertz band is proposed. The feasibility of such a wireless vision and the main research challenges toward its realization are analyzed from the technological, communications, and computer architecture perspectives.This publication is part of the Spanish I+D+i project TRAINER-A (ref. PID2020-118011GB-C21), funded by MCIN/AEI/10.13039/501100011033. This work has been also supported by the European Commission under H2020 grants WiPLASH (GA 863337), 2D-EPL (GA 952792), and Graphene Flagship (GA 881603); the FLAGERA framework under grant TUGRACO (HA 3022/9-1, LE 2440/3-1), the European Research Council under grants WINC (GA 101042080), COMPUSAPIEN (GA 725657), and PROJESTOR (GA 682675), the German Ministry of Education and Research under grant GIMMIK (03XP0210) and the and the German Research Foundation under grant HIPEDI (WA 4139/1-1).Peer ReviewedArticle signat per 21 autors/es: Sergi Abadal, Robert Guirado, Hamidreza Taghvaee, and Akshay Jain are with the Universitat Politècnica de Catalunya, Spain; Elana Pereira de Santana and Peter Haring Bolívar are with the University of Siegen, Germany; Mohamed Saeed, Renato Negra, Kun-Ta Wang, and Max C. Lemme are with RWTH Aachen University, Germany. Zhenxing Wang, Kun-Ta Wang, and Max C. Lemme are also with AMO GmbH, Germany; Joshua Klein, Marina Zapater, Alexandre Levisse, and David Atienza are with the Swiss Federal Institute of Technology, Switzerland. Marina Zapater is also with the University of Applied Sciences and Arts Western Switzerland; Davide Rossi and Francesco Conti are with the University of Bologna,Italy; Martino Dazzi, Geethan Karunaratne, Irem Boybat, and Abu Sebastian are with IBM Research Europe, SwitzerlandPostprint (author's final draft

Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors

The main design principles in computer architecture have recently shifted from a monolithic scaling-driven approach to the development of heterogeneous architectures that tightly co-integrate multiple specialized processor and memory chiplets. In such data-hungry multi-chip architectures, current Networksin- Package (NiPs) may not be enough to cater to their heterogeneous and fast-changing communication demands. This position paper makes the case for wireless in-package networking as the enabler of efficient and versatile wired-wireless interconnect fabrics for massive heterogeneous processors. To that end, the use of graphene-based antennas and transceivers with unique frequency-beam reconfigurability in the terahertz band is proposed. The feasibility of such a wireless vision and the main research challenges towards its realization are analyzed from the technological, communications, and computer architecture perspectives