Combinational Test Generation for Various Classes of Acyclic Sequential Circuits\Lambda

For combinational circuits, algorithms and programs ex-ist that provide acceptable fault coverages with 100 % fault efficiency. The same performance has not been possible forsequential ATPG, and that is the main reason for the widespread acceptance of the full-scan design [6]. However, con-cerns about the full-scan overheads of area, delay and test application time have motivated designers and researchers toexplore partial-scan techniques [1]

Prosiding Seminar Nasional Pendidikan Teknik Elektro (SNPTE) 2013

Seminar Nasional Pendidikan Teknik Elektro (SNPTE) 2013 ini diselenggarakan sebagai wahana bagi akademisi, peneliti, praktisi, asosiasi, industri dan pengambil kebijakan untuk bisa saling bertukar pikiran, bertukar pendapat, mempresentasikan pengalaman-pengalaman hasil penelitian maupun hasil kajian di bidang Pendidikan dan Teknologi Elektro. Tema dalam SNPTE 2013 ini adalah "Peningkatan Mutu Pendidikan Kejuruan Mengacu Kerangka Kualifikasi Nasional Indonesia (KKNI)"