9,178 research outputs found
Codes Correcting Two Deletions
In this work, we investigate the problem of constructing codes capable of
correcting two deletions. In particular, we construct a code that requires
redundancy approximately 8 log n + O(log log n) bits of redundancy, where n is
the length of the code. To the best of the author's knowledge, this represents
the best known construction in that it requires the lowest number of redundant
bits for a code correcting two deletions
Deletion codes in the high-noise and high-rate regimes
The noise model of deletions poses significant challenges in coding theory,
with basic questions like the capacity of the binary deletion channel still
being open. In this paper, we study the harder model of worst-case deletions,
with a focus on constructing efficiently decodable codes for the two extreme
regimes of high-noise and high-rate. Specifically, we construct polynomial-time
decodable codes with the following trade-offs (for any eps > 0):
(1) Codes that can correct a fraction 1-eps of deletions with rate poly(eps)
over an alphabet of size poly(1/eps);
(2) Binary codes of rate 1-O~(sqrt(eps)) that can correct a fraction eps of
deletions; and
(3) Binary codes that can be list decoded from a fraction (1/2-eps) of
deletions with rate poly(eps)
Our work is the first to achieve the qualitative goals of correcting a
deletion fraction approaching 1 over bounded alphabets, and correcting a
constant fraction of bit deletions with rate aproaching 1. The above results
bring our understanding of deletion code constructions in these regimes to a
similar level as worst-case errors
Quantum Deletion Codes Derived From Quantum Reed-Solomon Codes
This manuscript presents a construction method for quantum codes capable of
correcting multiple deletion errors. By introducing two new alogorithms, the
alternating sandwich mapping and the block error locator, the proposed method
reduces deletion error correction to erasure error correction. Unlike previous
quantum deletion error-correcting codes, our approach enables flexible code
rates and eliminates the requirement of knowing the number of deletions
Coding for Racetrack Memories
Racetrack memory is a new technology which utilizes magnetic domains along a
nanoscopic wire in order to obtain extremely high storage density. In racetrack
memory, each magnetic domain can store a single bit of information, which can
be sensed by a reading port (head). The memory has a tape-like structure which
supports a shift operation that moves the domains to be read sequentially by
the head. In order to increase the memory's speed, prior work studied how to
minimize the latency of the shift operation, while the no less important
reliability of this operation has received only a little attention.
In this work we design codes which combat shift errors in racetrack memory,
called position errors. Namely, shifting the domains is not an error-free
operation and the domains may be over-shifted or are not shifted, which can be
modeled as deletions and sticky insertions. While it is possible to use
conventional deletion and insertion-correcting codes, we tackle this problem
with the special structure of racetrack memory, where the domains can be read
by multiple heads. Each head outputs a noisy version of the stored data and the
multiple outputs are combined in order to reconstruct the data. Under this
paradigm, we will show that it is possible to correct, with at most a single
bit of redundancy, deletions with heads if the heads are
well-separated. Similar results are provided for burst of deletions, sticky
insertions and combinations of both deletions and sticky insertions
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