509 research outputs found
The Fourth Element: Characteristics, Modelling, and Electromagnetic Theory of the Memristor
In 2008, researchers at HP Labs published a paper in {\it Nature} reporting
the realisation of a new basic circuit element that completes the missing link
between charge and flux-linkage, which was postulated by Leon Chua in 1971. The
HP memristor is based on a nanometer scale TiO thin-film, containing a
doped region and an undoped region. Further to proposed applications of
memristors in artificial biological systems and nonvolatile RAM (NVRAM), they
also enable reconfigurable nanoelectronics. Moreover, memristors provide new
paradigms in application specific integrated circuits (ASICs) and field
programmable gate arrays (FPGAs). A significant reduction in area with an
unprecedented memory capacity and device density are the potential advantages
of memristors for Integrated Circuits (ICs). This work reviews the memristor
and provides mathematical and SPICE models for memristors. Insight into the
memristor device is given via recalling the quasi-static expansion of Maxwell's
equations. We also review Chua's arguments based on electromagnetic theory.Comment: 28 pages, 14 figures, Accepted as a regular paper - the Proceedings
of Royal Society
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Versatile stochastic dot product circuits based on nonvolatile memories for high performance neurocomputing and neurooptimization.
The key operation in stochastic neural networks, which have become the state-of-the-art approach for solving problems in machine learning, information theory, and statistics, is a stochastic dot-product. While there have been many demonstrations of dot-product circuits and, separately, of stochastic neurons, the efficient hardware implementation combining both functionalities is still missing. Here we report compact, fast, energy-efficient, and scalable stochastic dot-product circuits based on either passively integrated metal-oxide memristors or embedded floating-gate memories. The circuit's high performance is due to mixed-signal implementation, while the efficient stochastic operation is achieved by utilizing circuit's noise, intrinsic and/or extrinsic to the memory cell array. The dynamic scaling of weights, enabled by analog memory devices, allows for efficient realization of different annealing approaches to improve functionality. The proposed approach is experimentally verified for two representative applications, namely by implementing neural network for solving a four-node graph-partitioning problem, and a Boltzmann machine with 10-input and 8-hidden neurons
Vertical current induced domain wall motion in MgO-based magnetic tunnel junction with low current densities
Shifting electrically a magnetic domain wall (DW) by the spin transfer
mechanism is one of the future ways foreseen for the switching of spintronic
memories or registers. The classical geometries where the current is injected
in the plane of the magnetic layers suffer from a poor efficiency of the
intrinsic torques acting on the DWs. A way to circumvent this problem is to use
vertical current injection. In that case, theoretical calculations attribute
the microscopic origin of DW displacements to the out-of-plane (field-like)
spin transfer torque. Here we report experiments in which we controllably
displace a DW in the planar electrode of a magnetic tunnel junction by vertical
current injection. Our measurements confirm the major role of the out-of-plane
spin torque for DW motion, and allow to quantify this term precisely. The
involved current densities are about 100 times smaller than the one commonly
observed with in-plane currents. Step by step resistance switching of the
magnetic tunnel junction opens a new way for the realization of spintronic
memristive devices
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