1,391 research outputs found
YodaNN: An Architecture for Ultra-Low Power Binary-Weight CNN Acceleration
Convolutional neural networks (CNNs) have revolutionized the world of
computer vision over the last few years, pushing image classification beyond
human accuracy. The computational effort of today's CNNs requires power-hungry
parallel processors or GP-GPUs. Recent developments in CNN accelerators for
system-on-chip integration have reduced energy consumption significantly.
Unfortunately, even these highly optimized devices are above the power envelope
imposed by mobile and deeply embedded applications and face hard limitations
caused by CNN weight I/O and storage. This prevents the adoption of CNNs in
future ultra-low power Internet of Things end-nodes for near-sensor analytics.
Recent algorithmic and theoretical advancements enable competitive
classification accuracy even when limiting CNNs to binary (+1/-1) weights
during training. These new findings bring major optimization opportunities in
the arithmetic core by removing the need for expensive multiplications, as well
as reducing I/O bandwidth and storage. In this work, we present an accelerator
optimized for binary-weight CNNs that achieves 1510 GOp/s at 1.2 V on a core
area of only 1.33 MGE (Million Gate Equivalent) or 0.19 mm and with a power
dissipation of 895 {\mu}W in UMC 65 nm technology at 0.6 V. Our accelerator
significantly outperforms the state-of-the-art in terms of energy and area
efficiency achieving 61.2 TOp/s/[email protected] V and 1135 GOp/s/[email protected] V, respectively
Energy Academic Group Compilation of Abstracts 2012-2016
This report highlights the breadth of energy-related student research at NPS and reinforces the importance of energy as an integral aspect of today's Naval enterprise. The abstracts provided are from theses and a capstone project report completed by December 2012-March 2016 graduates.http://archive.org/details/energyacademicgr109454991
Power Profile Obfuscation using RRAMs to Counter DPA Attacks
Side channel attacks, such as Differential Power Analysis (DPA), denote a special class of attacks in which sensitive key information is unveiled through information extracted from the physical device executing a cryptographic algorithm. This information leakage, known as side channel information, occurs from computations in a non-ideal system composed of electronic devices such as transistors. Power dissipation is one classic side channel source, which relays information of the data being processed. DPA uses statistical analysis to identify data-dependent correlations in sets of power measurements.
Countermeasures against DPA focus on hiding or masking techniques at different levels of design abstraction and are typically associated with high power and area cost. Emerging technologies such as Resistive Random Access Memory (RRAM), offer unique opportunities to mitigate DPAs with their inherent memristor device characteristics such as variability in write time, ultra low power (0.1-3 pJ/bit), and high density (4F2).
In this research, an RRAM based architecture is proposed to mitigate the DPA attacks by obfuscating the power profile. Specifically, a dual RRAM based memory module masks the power dissipation of the actual transaction by accessing both the data and its complement from the memory in tandem. DPA attack resiliency for a 128-bit AES cryptoprocessor using RRAM and CMOS memory modules is compared against baseline CMOS only technology.
In the proposed AES architecture, four single port RRAM memory units store the
intermediate state of the encryption. The correlation between the state data and sets of power measurement is masked due to power dissipated from inverse data access on dual RRAM memory. A customized simulation framework is developed to design the attack scenarios using Synopsys and Cadence tool suites, along with a Hamming weight DPA attack module. The attack mounted on a baseline CMOS architecture is successful and the full key is recovered. However, DPA attacks mounted on the dual CMOS and RRAM based AES cryptoprocessor yielded unsuccessful results with no keys recovered, demonstrating the resiliency of the proposed architecture against DPA attacks
A Review of DC Shipboard Microgrids:Part I: Power Architectures, Energy Storage and Power Converters
Design and Service Provisioning Methods for Optical Networks in 5G and Beyond Scenarios
Network operators are deploying 5G while also considering the evolution towards 6G. They consider different enablers and address various challenges. One trend in the 5G deployment is network densification, i.e., deploying many small cell sites close to the users, which need a well-designed transport network (TN). The choice of the TN technology and the location for processing the 5G protocol stack functions are critical to contain capital and operational expenditures. Furthermore, it is crucial to ensure the resiliency of the TN infrastructure in case of a failure in nodes and/or links while the resource efficiency is maximized.Operators are also interested in 5G networks with flexibility and scalability features. In this context, one main question is where to deploy network functions so that the connectivity and compute resources are utilized efficiently while meeting strict service latency and availability requirements. Off-loading compute resources to large and central data centers (DCs) has some advantages, i.e., better utilization of compute resources at a lower cost. A backup path can be added to address service availability requirements when using compute off-loading strategies. This might impact the service blocking ratio and limit operators’ profit. The importance of this trade-off becomes more critical with the emergence of new 6G verticals.This thesis proposes novel methods to address the issues outlined above. To address the challenge of cost-efficient TN deployment, the thesis introduces a framework to study the total cost of ownership (TCO), latency, and reliability performance of a set of TN architectures for high-layer and low-layer functional split options. The architectural options are fiber- or microwave-based. To address the strict availability requirement, the thesis proposes a resource-efficient protection strategy against single node/link failure of the midhaul segment. The method selects primary and backup DCs for each aggregation node (i.e., nodes to which cell sites are connected) while maximizing the sharing of backup resources. Finally, to address the challenge of resource efficiency while provisioning services, the thesis proposes a backup-enhanced compute off-loading strategy (i.e., resource-efficient provisioning (REP)). REP selects a DC, a connectivity path, and (optionally) a backup path for each service request with the aim of minimizing resource usage while the service latency and availability requirements are met.Our results of the techno-economic assessment of the TN options reveal that, in some cases, microwave can be a good substitute for fiber technology. Several factors, including the geo-type, functional split option, and the cost of fiber trenching and microwave equipment, influence the effectiveness of the microwave. The considered architectures show similar latency and reliability performance and meet the 5G service requirements. The thesis also shows that a protection strategy based on shared connectivity and compute resources can lead to significant cost savings compared to benchmarks based on dedicated backup resources. Finally, the thesis shows that the proposed backup-enhanced compute off-loading strategy offers advantages in service blocking ratio and profit gain compared to a conventional off-loading approach that does not add a backup path. Benefits are even more evident considering next-generation services, e.g., expected on the market in 3 to 5 years, as the demand for services with stringent latency and availability will increase
Architecture and algorithm for reliable 5G network design
This Ph.D. thesis investigates the resilient and cost-efficient design of both C-RAN and Xhaul architectures. Minimization of network resources as well as reuse of already deployed infrastructure, either based on fiber, wavelength, bandwidth or Processing Units (PU), is investigated and shown to be effective to reduce the overall cost. Moreover, the design of a survivable network against a single node (Baseband Unit hotel (BBU), Centralized/Distributed Unit (CU/DU) or link failure proposed. The novel function location algorithm, which adopts dynamic function chaining in relation to the evolution of the traffic estimation also proposed and showed remarkable improvement in terms of bandwidth saving and multiplexing gain with respect to conventional C-RAN. Finally, the adoption of Ethernet-based fronthaul and the introduction of hybrid switches is pursued to further decrease network cost by increasing optical resource usage
ADVANCED RADIO ACCESS NETWORK FEATURING FLEXIBLE PER-UE SERVICE PROVISIONING AND COLLABORATIVE MOBILE EDGE COMPUTING
Enriched by numerous technological advances, radio access networks (RANs) in the fifth mobile networks generation (5G)-and-beyond strive to meet the goals of both mobile network operators (MNOs) and end-users. While MNOs seek efficiency, resiliency, reliability and flexibility of their networks, end-users are more concerned with the variety and quality of the provided, state-of-the-art, reasonably priced services. This has resulted in a complex, multi-tier, and heterogeneous RAN architecture that is severely challenged to achieve and maintain a strict reliability requirement of seven-nines (i.e., 99.99999% network up-time) and to meet ultra-reliable, low latency communications (URLLC) requirements with a latency upper bound of 1 ms end-to-end roundtrip time. Based on the flexible function split concept and data-plane programmability, this dissertation makes several key contributions to the body of knowledge on advanced, service-oriented RANs in two key core components. The first core component pertains to improving fronthaul efficiency, resiliency, flexibility, and latency performance with a cross-layer integration of Analog-Option-9 function split in the flexible fronthaul paradigm. Within the folds of that, the novel cross-layer digital-analog integration is experimentally investigated to pave the way for promising analog technologies to find their niche in 5G-and-beyond. The second core component is related to the design of lightweight, fronthaul-positioned multi-access edge computing (MEC) units to host Cooperative-URLLC applications at the edge of the fronthaul. Hence, from the vertical perspective, the dissertation provides solutions to support general URLLC applications and the Cooperative-URLLC variation by shrinking and eliminating latency sources at the Top-of-RAN and Low-RAN segments of advanced RANs.Ph.D
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