Nonlinear Equalization and Digital Pre-Distortion Techniques for Future Radar and Communications Digital Array Systems

Modern radar (military, automotive, weather, etc.) and communication systems seek to leverage the spatio-spectral efficiency of phased arrays. Specifically, there is an increasingly large demand for fully-digital arrays, with each antenna element having its own transmitter and receiver. Further, in order to makes these systems realizable, low-cost, low-complexity solutions are required, often sacrificing the system's linearity. Lower linearity paired with the inherent lack of RF spacial filtering can make these highly digital systems vulnerable to high-power interferering signals-- potentially introducing spectral regrowth and/or gain compression, distorting the signal-of-interest. Digital linearization solutions such as Digital Pre-Distiortion (DPD) and Nonlinear Equalization (NLEQ) have been shown to effectively mitigate nonlinearities for transmitters and receivers, respectively. Further, DPD and NLEQ seek to extend the effective dynamic range of digital arrays, helping the systems reach their designed dynamic range improvement of $10\log_{10}(N)$~dB, where $N$ is the number of transmitters/receivers. However, the performance of these solutions is ultimately determined by training model and waveform. Further, the nonlinear characteristics of a system can change with temperature, frequency, power, time, etc., requiring a robust calibration technique to maintain a high-level of nonlinear mitigation. This dissertation reviews the different types of nonlinear models and the current NLEQ and DPD algorithms for digital array systems. Further, a generalized calibration waveform for both NLEQ and DPD is proposed, allowing a system to maximize its dynamic range over power and frequency. Additionally, an \textit{in-situ} calibration method, leveraging the inherent mutual coupling in an array, is proposed as a solution to maintaining a high level of performance in a fielded digital array system over the system's lifetime. The combination of the proposed training waveform and \textit{in-situ} calibration technique prove to be very effective at adaptively creating a generalized solution to extending the dynamic range of future low-cost digital array systems

Radar Technology

In this book “Radar Technology”, the chapters are divided into four main topic areas: Topic area 1: “Radar Systems” consists of chapters which treat whole radar systems, environment and target functional chain. Topic area 2: “Radar Applications” shows various applications of radar systems, including meteorological radars, ground penetrating radars and glaciology. Topic area 3: “Radar Functional Chain and Signal Processing” describes several aspects of the radar signal processing. From parameter extraction, target detection over tracking and classification technologies. Topic area 4: “Radar Subsystems and Components” consists of design technology of radar subsystem components like antenna design or waveform design

Wireless Testing of Integrated Circuits.

Integrated circuits (ICs) are usually tested during manufacture by means of automatic testing equipment (ATE) employing probe cards and needles that make repeated physical contact with the ICs under test. Such direct-contact probing is very costly and imposes limitations on the use of ATE. For example, the probe needles must be frequently cleaned or replaced, and some emerging technologies such as three-dimensional ICs cannot be probed at all. As an alternative to conventional probe-card testing, wireless testing has been proposed. It mitigates many of the foregoing problems by replacing probe needles and contact points with wireless communication circuits. However, wireless testing also raises new problems which are poorly understood such as: What is the most suitable wireless communication technique to employ, and how well does it work in practice? This dissertation addresses the design and implementation of circuits to support wireless testing of ICs. Various wireless testing methods are investigated and evaluated with respect to their practicality. The research focuses on near-field capacitive communication because of its efficiency over the very short ranges needed during IC manufacture. A new capacitive channel model including chip separation, cross-talk, and misalignment effects is proposed and validated using electro-magnetic simulation studies to provide the intuitions for efficient antenna and circuit design. We propose a compact clock and data recovery architecture to avoid a dedicated clock channel. An analytical model which predicts the DC-level fluctuation due to the capacitive channel is presented. Based on this model, feed-forward clock selection is designed to enhance performance. A method to select proper channel termination is discussed to maximize the channel efficiency for return-to-zero signaling. Two prototype ICs incorporating wireless testing systems were fabricated and tested with the proposed methods of testing digital circuits. Both successfully demonstrated gigahertz communication speeds with a bit-error rate less than 10^−11. A third prototype IC containing analog voltage measurement circuits was implemented to determine the feasibility of wirelessly testing analog circuits. The fabricated prototype achieved satisfactory voltage measurement with 1 mV resolution. Our work demonstrates the validity of the proposed models and the feasibility of near-field capacitive communication for wireless testing of ICs.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/93993/1/duelee_1.pd