Array algorithms for H-infinity estimation

In this paper we develop array algorithms for H-infinity filtering. These algorithms can be regarded as the Krein space generalizations of H-2 array algorithms, which are currently the preferred method for implementing H-2 biters, The array algorithms considered include typo main families: square-root array algorithms, which are typically numerically more stable than conventional ones, and fast array algorithms which, when the system is time-invariant, typically offer an order of magnitude reduction in the computational effort. Both have the interesting feature that one does not need to explicitly check for the positivity conditions required for the existence of H-infinity filters, as these conditions are built into the algorithms themselves. However, since H-infinity square-root algorithms predominantly use J-unitary transformations, rather than the unitary transformations required in the H-2 case, further investigation is needed to determine the numerical behavior of such algorithms

Array algorithms for H^2 and H^∞ estimation

Currently, the preferred method for implementing H^2 estimation algorithms is what is called the array form, and includes two main families: square-root array algorithms, that are typically more stable than conventional ones, and fast array algorithms, which, when the system is time-invariant, typically offer an order of magnitude reduction in the computational effort. Using our recent observation that H^∞ filtering coincides with Kalman filtering in Krein space, in this chapter we develop array algorithms for H^∞ filtering. These can be regarded as natural generalizations of their H^2 counterparts, and involve propagating the indefinite square roots of the quantities of interest. The H^∞ square-root and fast array algorithms both have the interesting feature that one does not need to explicitly check for the positivity conditions required for the existence of H^∞ filters. These conditions are built into the algorithms themselves so that an H^∞ estimator of the desired level exists if, and only if, the algorithms can be executed. However, since H^∞ square-root algorithms predominantly use J-unitary transformations, rather than the unitary transformations required in the H^2 case, further investigation is needed to determine the numerical behavior of such algorithms

Comparison of SAGE and classical multi-antenna algorithms for multipath mitigation in real-world environment

The performance of the Space Alternating Generalized Expectation Maximisation (SAGE) algorithm for multipath mitigation is assessed in this paper. Numerical simulations have already proven the potential of SAGE in navigation context, but practical aspects of the implementation of such a technique in a GNSS receiver are the topic for further investigation. In this paper, we will present the first results of SAGE implementation in a real world environmen

A new multipath mitigation method for GNSS receivers based on antenna array

the potential of small antenna array for multipath mitigation in GNSS systems is considered in this paper. To discriminate the different incoming signals (Line of sight and multipaths), a new implementation of the well known SAGE algorithm is proposed. This allows a significant complexity reduction and it is fully compatible with conventional GNSS receivers. Theoretical study thanks to the Cramer Rao Bound derivation and tracking simulation results (in static and dynamic scenarios) show that the proposed method is a very promising approach for the multipath mitigation problem in GNSS receivers

Dynamically variable step search motion estimation algorithm and a dynamically reconfigurable hardware for its implementation

Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available High Definition (HD) video formats, the computational complexity of De full search (FS) ME algorithm is prohibitively high, whereas the PSNR obtained by fast search ME algorithms is low. Therefore, ill this paper, we present Dynamically Variable Step Search (DVSS) ME algorithm for Processing high definition video formats and a dynamically reconfigurable hardware efficiently implementing DVSS algorithm. The architecture for efficiently implementing DVSS algorithm. The simulation results showed that DVSS algorithm performs very close to FS algorithm by searching much fewer search locations than FS algorithm and it outperforms successful past search ME algorithms by searching more search locations than these algorithms. The proposed hardware is implemented in VHDL and is capable, of processing high definition video formats in real time. Therefore, it can be used in consumer electronics products for video compression, frame rate up-conversion and de-interlacing(1)