[[alternative]]Intelligent Networked Visual Monitoring and Control Systems (II)

計畫編號：NSC89-2218-E032-019研究期間：200008~200107研究經費：647,000[[sponsorship]]行政院國家科學委員

Efficient VLSI Architectures for Image Compression Algorithms

An image, in its original form, contains huge amount of data which demands not only large amount of memory requirements for its storage but also causes inconvenient transmission over limited bandwidth channel. Image compression reduces the data from the image in either lossless or lossy way. While lossless image compression retrieves the original image data completely, it provides very low compression. Lossy compression techniques compress the image data in variable amount depending on the quality of image required for its use in particular application area. It is performed in steps such as image transformation, quantization and entropy coding. JPEG is one of the most used image compression standard which uses discrete cosine transform (DCT) to transform the image from spatial to frequency domain. An image contains low visual information in its high frequencies for which heavy quantization can be done in order to reduce the size in the transformed representation. Entropy coding follows to further reduce the redundancy in the transformed and quantized image data. Real-time data processing requires high speed which makes dedicated hardware implementation most preferred choice. The hardware of a system is favored by its lowcost and low-power implementation. These two factors are also the most important requirements for the portable devices running on battery such as digital camera. Image transform requires very high computations and complete image compression system is realized through various intermediate steps between transform and final bit-streams. Intermediate stages require memory to store intermediate results. The cost and power of the design can be reduced both in efficient implementation of transforms and reduction/removal of intermediate stages by employing different techniques. The proposed research work is focused on the efficient hardware implementation of transform based image compression algorithms by optimizing the architecture of the system. Distribute arithmetic (DA) is an efficient approach to implement digital signal processing algorithms. DA is realized by two different ways, one through storage of precomputed values in ROMs and another without ROM requirements. ROM free DA is more efficient. For the image transform, architectures of one dimensional discrete Hartley transform (1-D DHT) and one dimensional DCT (1-D DCT) have been optimized using ROM free DA technique. Further, 2-D separable DHT (SDHT) and 2-D DCT architectures have been implemented in row-column approach using two 1-D DHT and two 1-D DCT respectively. A finite state machine (FSM) based architecture from DCT to quantization has been proposed using the modified quantization matrix in JPEG image compression which requires no memory in storage of quantization table and DCT coefficients. In addition, quantization is realized without use of multipliers that require more area and are power hungry. For the entropy encoding, Huffman coding is hardware efficient than arithmetic coding. The use of Huffman code table further simplifies the implementation. The strategies have been used for the significant reduction of memory bits in storage of Huffman code table and the complete Huffman coding architecture encodes the transformed coefficients one bit per clock cycle. Direct implementation algorithm of DCT has the advantage that it is free of transposition memory to store intermediate 1-D DCT. Although recursive algorithms have been a preferred method, these algorithms have low accuracy resulting in image quality degradation. A non-recursive equation for the direct computation of DCT coefficients have been proposed and implemented in both 0.18 µm ASIC library as well as FPGA. It can compute DCT coefficients in any order and all intermediate computations are free of fractions and hence very high image quality has been obtained in terms of PSNR. In addition, one multiplier and one register bit-width need to be changed for increasing the accuracy resulting in very low hardware overhead. The architecture implementation has been done to obtain zig-zag ordered DCT coefficients. The comparison results show that this implementation has less area in terms of gate counts and less power consumption than the existing DCT implementations. Using this architecture, the complete JPEG image compression system has been implemented which has Huffman coding module, one multiplier and one register as the only additional modules. The intermediate stages (DCT to Huffman encoding) are free of memory, hence efficient architecture is obtained

An efficient spatial prediction-based image compression scheme

[[abstract]]An efficient spatial prediction-based progressive image compression scheme is developed in this paper. The proposed scheme consists of two phases, namely, the prediction phase and the quantization phase. In the prediction phase, information of the nearest neighbor pixels is utilized to predict the center pixel. Next in-place processes are taken, i.e., the resulting prediction error is stored in the same memory location as the predicted pixel. Thus, the temporary storage space required is significantly reduced in the encoding process as well as decoding process. The prediction scheme generates prediction error images with hierarchical structure, which can employ the result of many existing quantization schemes, such as EZW and SPIHT algorithms. As a result, a progressive coding feature is obtained in a straightforward manner. In the quantization phase, we extend the multilevel threshold scheme. Not only the pixel intensity value itself but also level significance is taken into account. In the experimental testing, we illustrate that the proposed scheme yields compression quality advantages. It outperforms several existing image compression schemes. Furthermore, the proposed scheme can be realized by only integer addition and shift operations. Tremendous amounts of computation-saving are achieved. The above features make the proposed image compression scheme beneficial to the areas of real-time applications and wireless transmission in limited bandwidth and low computation power environments[[notice]]補正完成[[conferencetype]]國際[[conferencedate]]20000528~20000530[[conferencelocation]]Geneva, Switzerlan

An efficient spatial prediction-based image compression scheme

[[abstract]]We have designed a spatial prediction-based image-compression scheme. The proposed scheme consists of two phases: the prediction phase and the quantization phase. In the prediction phase, a hierarchical structure among pixels in the image is built. Following the constructed hierarchical structure, the neighboring pixels are utilized to predict every central pixel. The prediction scheme generates an image map which indicates the prediction errors. The structure of the resulting image map is very similar to the result of a discrete wavelet transform. Thus, most quantization methods of wavelet or subband image-compression algorithms can be followed in our scheme directly to yield good compression performance. In the quantization phase, we design a multilevel threshold scheme to further enhance the result of SPIHT by taking the significance of the pixel values and the hierarchical levels into account. Furthermore, the proposed scheme can be realized by only a few integer additions and bit shifts. Simulation results indicate that the visual quality of the designed efficient spatial prediction-based image compression scheme is competitive with JPEG. All the above features make the designed image-compression scheme beneficial to the applications of real-time and wireless transmission in low-computational power environments.[[incitationindex]]SCI[[incitationindex]]EI[[booktype]]紙