594 research outputs found
Scheduling and reconfiguration of interconnection network switches
Interconnection networks are important parts of modern computing systems, facilitating communication between a system\u27s components. Switches connecting various nodes of an interconnection network serve to move data in the network. The switch\u27s delay and throughput impact the overall performance of the network and thus the system. Scheduling efficient movement of data through a switch and configuring the switch to realize a schedule are the main themes of this research. We consider various interconnection network switches including (i) crossbar-based switches, (ii) circuit-switched tree switches, and (iii) fat-tree switches. For crossbar-based input-queued switches, a recent result established that logarithmic packet delay is possible. However, this result assumes that packet transmission time through the switch is no less than schedule-generation time. We prove that without this assumption (as is the case in practice) packet delay becomes linear. We also report results of simulations that bear out our result for practical switch sizes and indicate that a fast scheduling algorithm reduces not only packet delay but also buffer size. We also propose a fast mesh-of-trees based distributed switch scheduling (maximal-matching based) algorithm that has polylog complexity. A circuit-switched tree (CST) can serve as an interconnect structure for various computing architectures and models such as the self-reconfigurable gate array and the reconfigurable mesh. A CST is a tree structure with source and destination processing elements as leaves and switches as internal nodes. We design several scheduling and configuration algorithms that distributedly partition a given set of communications into non-conflicting subsets and then establish switch settings and paths on the CST corresponding to the communications. A fat-tree is another widely used interconnection structure in many of today\u27s high-performance clusters. We embed a reconfigurable mesh inside a fat-tree switch to generate efficient connections. We present an R-Mesh-based algorithm for a fat-tree switch that creates buses connecting input and output ports corresponding to various communications using that switch
Qualitative Properties of alpha-Weighted Scheduling Policies
We consider a switched network, a fairly general constrained queueing network
model that has been used successfully to model the detailed packet-level
dynamics in communication networks, such as input-queued switches and wireless
networks. The main operational issue in this model is that of deciding which
queues to serve, subject to certain constraints. In this paper, we study
qualitative performance properties of the well known -weighted
scheduling policies. The stability, in the sense of positive recurrence, of
these policies has been well understood. We establish exponential upper bounds
on the tail of the steady-state distribution of the backlog. Along the way, we
prove finiteness of the expected steady-state backlog when , a
property that was known only for . Finally, we analyze the
excursions of the maximum backlog over a finite time horizon for . As a consequence, for , we establish the full state space
collapse property.Comment: 13 page
- …