Consensus problems in networks of agents with switching topology and time-delays

In this paper, we discuss consensus problems for networks of dynamic agents with fixed and switching topologies. We analyze three cases: 1) directed networks with fixed topology; 2) directed networks with switching topology; and 3) undirected networks with communication time-delays and fixed topology. We introduce two consensus protocols for networks with and without time-delays and provide a convergence analysis in all three cases. We establish a direct connection between the algebraic connectivity (or Fiedler eigenvalue) of the network and the performance (or negotiation speed) of a linear consensus protocol. This required the generalization of the notion of algebraic connectivity of undirected graphs to digraphs. It turns out that balanced digraphs play a key role in addressing average-consensus problems. We introduce disagreement functions for convergence analysis of consensus protocols. A disagreement function is a Lyapunov function for the disagreement network dynamics. We proposed a simple disagreement function that is a common Lyapunov function for the disagreement dynamics of a directed network with switching topology. A distinctive feature of this work is to address consensus problems for networks with directed information flow. We provide analytical tools that rely on algebraic graph theory, matrix theory, and control theory. Simulations are provided that demonstrate the effectiveness of our theoretical results

FPGA Implementations Comparison of Neuro-cortical Inspired Convolution Processors for Spiking Systems

Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In these scenarios the visual information is divided in frames and each one has to be completely processed before the next frame arrives. Recently a new method for computing convolutions based on the neuro-inspired philosophy of spiking systems (Address-Event-Representation systems, AER) is achieving high performances. In this paper we present two FPGA implementations of AERbased convolution processors that are able to work with 64x64 images and programmable kernels of up to 11x11 elements. The main difference is the use of RAM for integrators in one solution and the absence of integrators in the second solution that is based on mapping operations. The maximum equivalent operation rate is 163.51 MOPS for 11x11 kernels, in a Xilinx Spartan 3 400 FPGA with a 50MHz clock. Formulations, hardware architecture, operation examples and performance comparison with frame-based convolution processors are presented and discussed.Ministerio de Ciencia e Innovación TEC2006-11730-C03-02Junta de Andalucía P06-TIC-0141

Local Monopsony Power in the Market for Broilers - Evidence from a Farm Survey

The exercise of monopsony power by broiler processing firms is plausible because production occurs within localized complexes, which limits the number of integrators with whom growers can contract. In addition, growers face distinct hold-up risks as broiler production requires a substantial investment in specific assets and most production contracts do not involve long-term purchasing commitments by integrators. This paper provides an initial exploration of the links between the local concentration of broiler integrators and grower compensation under production contracts using data from the 2006 broiler version of USDA’s Agricultural Resource Management Survey. Results of this preliminary study, which accounts for characteristics of the operation and specific features of the production contract, suggest a small but economically meaningful effect of concentration on grower concentration. Limitations of the current analysis and future possible model extensions are discussed.poultry, broilers, market power, monopsony, production contracts, Livestock Production/Industries, Marketing,

Agreement Problems in Networks with Directed Graphs and Switching Topology

In this paper, we provide tools for convergence and performance analysis of an agreement protocol for a network of integrator agents with directed information flow. Moreover, we analyze algorithmic robustness of this consensus protocol for the case of a network with mobile nodes and switching topology. We establish a connection between the Fiedler eigenvalue of the graph Laplacian and the performance of this agreement protocol. We demostrate that a class of directed graphs, called balanced graphs, have a crucial role in solving average-consensus problems. Based on the properties of balanced graphs, a group disagreement function (i.e. Lyapunov function) is proposed for convergence analysis of this agreement protocol for networks with directed graphs. This group disagreement function is later used for convergence analysis for the agreement problem in networks with switching topology. We provide simulation results that are consistent with our theoretical results and demonstrate the effectiveness of the proposed analytical tools

Variational Integrators for Almost-Integrable Systems

We construct several variational integrators--integrators based on a discrete variational principle--for systems with Lagrangians of the form L = L_A + epsilon L_B, with epsilon << 1, where L_A describes an integrable system. These integrators exploit that epsilon << 1 to increase their accuracy by constructing discrete Lagrangians based on the assumption that the integrator trajectory is close to that of the integrable system. Several of the integrators we present are equivalent to well-known symplectic integrators for the equivalent perturbed Hamiltonian systems, but their construction and error analysis is significantly simpler in the variational framework. One novel method we present, involving a weighted time-averaging of the perturbing terms, removes all errors from the integration at O(epsilon). This last method is implicit, and involves evaluating a potentially expensive time-integral, but for some systems and some error tolerances it can significantly outperform traditional simulation methods.Comment: 14 pages, 4 figures. Version 2: added informative example; as accepted by Celestial Mechanics and Dynamical Astronom

On the AER Convolution Processors for FPGA

Image convolution operations in digital computer systems are usually very expensive operations in terms of resource consumption (processor resources and processing time) for an efficient Real-Time application. In these scenarios the visual information is divided into frames and each one has to be completely processed before the next frame arrives in order to warranty the real-time. A spike-based philosophy for computing convolutions based on the neuro-inspired Address-Event- Representation (AER) is achieving high performances. In this paper we present two FPGA implementations of AER-based convolution processors for relatively small Xilinx FPGAs (Spartan-II 200 and Spartan-3 400), which process 64x64 images with 11x11 convolution kernels. The maximum equivalent operation rate that can be reached is 163.51 MOPS for 11x11 kernels, in a Xilinx Spartan 3 400 FPGA with a 50MHz clock. Formulations, hardware architecture, operation examples and performance comparison with frame-based convolution processors are presented and discussed.Ministerio de Ciencia e Innovación TEC2006-11730-C03-02Ministerio de Ciencia e Innovación TEC2009-10639-C04-02Junta de Andalucía P06-TIC-0141