345 research outputs found

    Optimizing Frameworks Performance Using C++ Modules Aware ROOT

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    ROOT is a data analysis framework broadly used in and outside of High Energy Physics (HEP). Since HEP software frameworks always strive for performance improvements, ROOT was extended with experimental support of runtime C++ Modules. C++ Modules are designed to improve the performance of C++ code parsing. C++ Modules offers a promising way to improve ROOT's runtime performance by saving the C++ header parsing time which happens during ROOT runtime. This paper presents the results and challenges of integrating C++ Modules into ROOT.Comment: 8 pages, 3 figures, 6 listing, CHEP 2018 - 23rd International Conference on Computing in High Energy and Nuclear Physic

    Extending ROOT through Modules

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    The ROOT software framework is foundational for the HEP ecosystem, providing capabilities such as IO, a C++ interpreter, GUI, and math libraries. It uses object-oriented concepts and build-time components to layer between them. We believe additional layering formalisms will benefit ROOT and its users. We present the modularization strategy for ROOT which aims to formalize the description of existing source components, making available the dependencies and other metadata externally from the build system, and allow post-install additions of functionality in the runtime environment. components can then be grouped into packages, installable from external repositories to deliver post-install step of missing packages. This provides a mechanism for the wider software ecosystem to interact with a minimalistic install. Reducing intra-component dependencies improves maintainability and code hygiene. We believe helping maintain the smallest "base install" possible will help embedding use cases. The modularization effort draws inspiration from the Java, Python, and Swift ecosystems. Keeping aligned with the modern C++, this strategy relies on forthcoming features such as C++ modules. We hope formalizing the component layer will provide simpler ROOT installs, improve extensibility, and decrease the complexity of embedding in other ecosystemsComment: 8 pages, 2 figures, 1 listing, CHEP 2018 - 23rd International Conference on Computing in High Energy and Nuclear Physic

    Cost-effective Ethernet Communication for Low Cost Microcontroller Architecture

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    With the advancement of microelectronic technology and the overall rising trend in the use of low cost microcontrollers the need to share information over the existing infrastructure is more and more emphasized. The problem that persists is how to implement Ethernet communication in low cost microcontrollers while retaining low cost of the device. This paper proposes the use of Microchip’s Stand-Alone Ethernet Controller ENC28J60 in order to establish Ethernet communication towards the application located on a Host PC. In order to reduce the induced overhead on the existing microcontroller firmware size, the paper proposes the use of User Datagram Protocol (UDP) alongside with added authentication in the form of Basic Access Authentication using the Base64 algorithm to establish communication. The communication is tested using the Atmel AVR microcontroller architecture (Atmel AVR XMEGA) and the Stand-Alone Ethernet Controller whereas the sent data is displayed on a National Instruments LabVIEW application running on a Host PC. The measurement is carried out by using network protocol analysis and the comparison is made against the existing communication protocol (TFTP). The proposed communication is compared to one of the existing protocols, Trivial File Transfer Protocol (TFTP). The results are visible in a higher data rate and a lower flash size for implementation, representing an advantage over the existing protocols

    Include-Analysis for C++ Source Code

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    The C++ programming language is highly versatile and leaves many aspects of code organization to programmers, but provides functionality for code separation into source and header files. As projects have grown larger in size and C++ has found its way into critical infrastructure, the community has started developing a host of best-practice guidelines for code organization. Since these are not programmatically enforced during development, static include analysis is an excellent tool for checking programmers adherence to these self-imposed guidelines. In this work, the Axivion Suite by the Axivion GmbH is used to develop a set of rules that enforce a number of guidelines as they may be encountered in real-world applications. The Axivion Suite uses a proprietary compiler to gather analysis data on existing C++ source code of a given project. The rules presented here are enforced by running specially developed Python scripts on the analysis data generated by the Axivion compiler. Finally, the entire set of rules is used to analyze an existing application, "Notepad++", and the results are compared to Axivion's proprietary rules, gathered under the name of Generic stylechecks. "Notepad++" consists of a core program and the Scintilla and Boost libraries, all three of which exhibit a host of different issues. Overall, the rules developed here uncover 3,673 and Axivion's rules 3,890 violations. The minutiae of these results are discussed and final conclusions about this work and Axivion's implementation drawn

    BPFabric: Data Plane Programmability for Software Defined Networks

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    In its current form, OpenFlow, the de facto implementation of SDN, separates the network’s control and data planes allowing a central controller to alter the matchaction pipeline using a limited set of fields and actions. To support new protocols, forwarding logic, telemetry, monitoring or even middlebox-like functions the currently available programmability in SDN is insufficient. In this paper, we introduce BPFabric, a platform, protocol, and language-independent architecture to centrally program and monitor the data plane. BPFabric leverages eBPF, a platform and protocol independent instruction set to define the packet processing and forwarding functionality of the data plane. We introduce a control plane API that allows data plane functions to be deployed onthe-fly, reporting events of interest and exposing network internal state. We present a raw socket and DPDK implementation of the design, the former for large-scale experimentation using environment such as Mininet and the latter for high-performance low-latency deployments. We show through examples that functions unrealisable in OpenFlow can leverage this flexibility while achieving similar or better performance to today’s static design
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