7 research outputs found

    Three-dimensional Tip Electrode Array Technology for High Resolution Neuro-Electronic Systems used in Electrophysiological Experiments in-vitro

    Get PDF
    A three-dimensional tip electrode array technology for in-vitro electrophysiological experiments is presented. Based on simulation results obtained with a finite element model of the neuron-electrode interface, it has been shown that the electrical coupling between the neural cells and the three-dimensional tip electrode array is improved compared to standard planar electrodes. Consequently, three-dimensional microelectrode arrays (MEAs) exhibiting a higher spatial resolution than classical integrated MEA systems have been manufactured using the proposed fabrication process. Three-dimensional tip electrode arrays with an electrode diameter of 3-4µm, a height of 1.75µm, and a pitch dimension of 5-6µm have been manufactured on silicon substrate. Future in-vitro electrophysiological experiments are expected to confirm the superiority of the three-dimensional electrodes over the planar electrodes

    An Electrical Model of the Cell-Electrode Interface for High-density Microelectrode Arrays

    Get PDF
    A point-contact model is presented, and an areacontact model has been analytically derived in order to model the electrical characteristic of the cell-electrode interface of high-density neuron cultures. The area-contact model is presented as a model more suitable for subcellular multielectrode resolution, which is a requisite for modeling and simulating the electrical behavior of novel high-density microelectrode arrays. Furthermore, when the electrode is aligned and centered with the cell, an optimum electrode diameter for recording the electrical activity of neural cells can be analytically derived, which is between 7-8 µm with a typical load capacitance of 10 pF

    A cell-electrode interface noise model for high-density microelectrode arrays

    Get PDF
    A cell-electrode interface noise model is developed which is dedicated to enable the co-simulation of the cell-electrode electrical characteristics, along with the electronics of novel CMOS-based MEA. The electrode noise is investigated for Pt and Pt black electrodes. It is shown that the electrode noise can be the dominant noise source in the full system. Moreover, Pt black electrodes benefit from up to 5 µVrms decrease of the electrode output noise, for small electrodes. Furthermore, the cell-electrode interface noise spectral density is shown to be 10 dB to 20 dB larger at 1 kHz when a cell is lying on top of the electrode. This increase depends on the neural cell adhesion on the MEA surface

    Active C4 electrodes for local field potential recording applications

    Get PDF
    Extracellular neural recording, with multi-electrode arrays (MEAs), is a powerful method used to study neural function at the network level. However, in a high density array, it can be costly and time consuming to integrate the active circuit with the expensive electrodes. In this paper, we present a 4 mm × 4 mm neural recording integrated circuit (IC) chip, utilizing IBM C4 bumps as recording electrodes, which enable a seamless active chip and electrode integration. The IC chip was designed and fabricated in a 0.13 μm BiCMOS process for both in vitro and in vivo applications. It has an input-referred noise of 4.6 μV rms for the bandwidth of 10 Hz to 10 kHz and a power dissipation of 11.25 mW at 2.5 V, or 43.9 μW per input channel. This prototype is scalable for implementing larger number and higher density electrode arrays. To validate the functionality of the chip, electrical testing results and acute in vivo recordings from a rat barrel cortex are presented.R01 NS072385 - NINDS NIH HHS; 1R01 NS072385 - NINDS NIH HH

    Electrical modeling of the cell-electrode interface for recording neural activity from high-density microelectrode arrays

    Get PDF
    Accurate electrical models are needed to support the design of modern microelectrode arrays. The point-contact model is presented thoroughly, and an area-contact model is analytically derived in order to model the electrical characteristics of the cell-electrode interface at subcellular resolution. An optimum electrode diameter for recording the electrical activity of neurons is analytically determined at 8 um, with a cell diameter of 10 um and a typical load capacitance of 10 pF. Finally, three- dimensional tip electrodes are characterized using the area- contact model. An improvement of the electrical coupling up to 20 dB is observed for small electrodes, in simulation

    An 11k-Electrode 126-Channel High-Density Microelectrode Array to Interact with Electrogenic Cells

    No full text

    A 256-input micro-electrode array with integrated cmos amplifiers for neural signal recording

    Full text link
    Thesis (Ph.D.)--Boston UniversityThe nervous system communicates and processes information through its basic structural units -- individual neurons (nerve cells). Neurons convey neural information via electrical and chemical signals, which makes electrophysiological recording techniques very important in the study of neurophysiology. Specifically, active microelectrode arrays (MEAs) with amplifiers integrated on the same substrate are used because they provide a very powerful neural electrical recording technique that can be directly interfaced to acute slices and cell cultures. 2D planer electrodes are typically used for recording from neural cultures in vitro, while in vivo recording in live animals invariably requires the use of 3D electrodes. I have designed an active MEA with neural amplifiers and 3D electrodes, all integrated on a single chip. The electrodes are commercially available 3D C4 (Controlled Collapse Chip Connect) flip-chip bonding solder balls that have a diameter of 100 µm and a pitch of 200 µm. An active MEA neural recording chip -- the Multiple-Input Neural Sensor (MINS) chip -- was designed and fabricated using the IBM BiCMOS 8HP 0.13 µm technology. The MINS IC has 256 input channels that are time-division multiplexed into two output pads. Each channel was designed to work at a 20 kHz frame rate with a total voltage gain of 60 dB per channel with an input-referred noise voltage of 5.3 µVrms over 10 Hz to 10 kHz. The entire MINS chip has an area of 4 x 4 mm^2 with 256 input C4s plus 20 wire-bond pads on two adjacent edges of the chip for power, control, and outputs. The fabricated MINS chips are wire-bonded to standard pin grid array (PGA), open-top PGA, and custom-designed printed circuit board (PCB) packages for electrical, in vitro, and in vivo testing, respectively. After process variation correction, the voltage gain of the 256 neural amplifiers, measured in vitro across several chips, has a mean value of 58.7 dB and a standard deviation of 0.37 dB. Measurements done with the electrical testing package demonstrate that the MINS IC has a flat frequency response from 0.05 Hz to 1.4 MHz, an input-referred noise voltage of 4.6 µVrms over 10 Hz to 10 kHz, an output voltage swing as large as 1.5 V peak-to-peak, and a total power consumption of 11.25 mW, or 43.9 µW per input channel
    corecore