10-GHz fully differential Sallen–Key lowpass biquad filters in 55nm SiGe BICMOS technology

Multi-GHz lowpass filters are key components for many RF applications and are required for the implementation of integrated high-speed analog-to-digital and digital-to-analog converters and optical communication systems. In the last two decades, integrated filters in the Multi-GHz range have been implemented using III-V or SiGe technologies. In all cases in which the size of passive components is a concern, inductorless designs are preferred. Furthermore, due to the recent development of high-speed and high-resolution data converters, highly linear multi-GHz filters are required more and more. Classical open loop topologies are not able to achieve high linearity, and closed loop filters are preferred in all applications where linearity is a key requirement. In this work, we present a fully differential BiCMOS implementation of the classical Sallen Key filter, which is able to operate up to about 10 GHz by exploiting both the bipolar and MOS transistors of a commercial 55-nm BiCMOS technology. The layout of the biquad filter has been implemented, and the results of post-layout simulations are reported. The biquad stage exhibits excellent SFDR (64 dB) and dynamic range (about 50 dB) due to the closed loop operation, and good power efficiency (0.94 pW/Hz/pole) with respect to comparable active inductorless lowpass filters reported in the literature. Moreover, unlike other filters, it exploits the different active devices offered by commercial SiGe BiCMOS technologies. Parametric and Monte Carlo simulations are also included to assess the robustness of the proposed biquad filter against PVT and mismatch variations

Reconfigurable Receiver Front-Ends for Advanced Telecommunication Technologies

The exponential growth of converging technologies, including augmented reality, autonomous vehicles, machine-to-machine and machine-to-human interactions, biomedical and environmental sensory systems, and artificial intelligence, is driving the need for robust infrastructural systems capable of handling vast data volumes between end users and service providers. This demand has prompted a significant evolution in wireless communication, with 5G and subsequent generations requiring exponentially improved spectral and energy efficiency compared to their predecessors. Achieving this entails intricate strategies such as advanced digital modulations, broader channel bandwidths, complex spectrum sharing, and carrier aggregation scenarios. A particularly challenging aspect arises in the form of non-contiguous aggregation of up to six carrier components across the frequency range 1 (FR1). This necessitates receiver front-ends to effectively reject out-of-band (OOB) interferences while maintaining high-performance in-band (IB) operation. Reconfigurability becomes pivotal in such dynamic environments, where frequency resource allocation, signal strength, and interference levels continuously change. Software-defined radios (SDRs) and cognitive radios (CRs) emerge as solutions, with direct RF-sampling receivers offering a suitable architecture in which the frequency translation is entirely performed in digital domain to avoid analog mixing issues. Moreover, direct RF- sampling receivers facilitate spectrum observation, which is crucial to identify free zones, and detect interferences. Acoustic and distributed filters offer impressive dynamic range and sharp roll off characteristics, but their bulkiness and lack of electronic adjustment capabilities limit their practicality. Active filters, on the other hand, present opportunities for integration in advanced CMOS technology, addressing size constraints and providing versatile programmability. However, concerns about power consumption, noise generation, and linearity in active filters require careful consideration.This thesis primarily focuses on the design and implementation of a low-voltage, low-power RFFE tailored for direct sampling receivers in 5G FR1 applications. The RFFE consists of a balun low-noise amplifier (LNA), a Q-enhanced filter, and a programmable gain amplifier (PGA). The balun-LNA employs noise cancellation, current reuse, and gm boosting for wideband gain and input impedance matching. Leveraging FD-SOI technology allows for programmable gain and linearity via body biasing. The LNA's operational state ranges between high-performance and high-tolerance modes, which are apt for sensitivityand blocking tests, respectively. The Q-enhanced filter adopts noise-cancelling, current-reuse, and programmable Gm-cells to realize a fourth-order response using two resonators. The fourth-order filter response is achieved by subtracting the individual response of these resonators. Compared to cascaded and magnetically coupled fourth-order filters, this technique maintains the large dynamic range of second-order resonators. Fabricated in 22-nm FD-SOI technology, the RFFE achieves 1%-40% fractional bandwidth (FBW) adjustability from 1.7 GHz to 6.4 GHz, 4.6 dB noise figure (NF) and an OOB third-order intermodulation intercept point (IIP3) of 22 dBm. Furthermore, concerning the implementation uncertainties and potential variations of temperature and supply voltage, design margins have been considered and a hybrid calibration scheme is introduced. A combination of on-chip and off-chip calibration based on noise response is employed to effectively adjust the quality factors, Gm-cells, and resonance frequencies, ensuring desired bandpass response. To optimize and accelerate the calibration process, a reinforcement learning (RL) agent is used.Anticipating future trends, the concept of the Q-enhanced filter extends to a multiple-mode filter for 6G upper mid-band applications. Covering the frequency range from 8 to 20 GHz, this RFFE can be configured as a fourth-order dual-band filter, two bandpass filters (BPFs) with an OOB notch, or a BPF with an IB notch. In cognitive radios, the filter’s transmission zeros can be positioned with respect to the carrier frequencies of interfering signals to yield over 50 dB blocker rejection

Recent Advances in Antenna Design for 5G Heterogeneous Networks

The aim of this book is to highlight up to date exploited technologies and approaches in terms of antenna designs and requirements. In this regard, this book targets a broad range of subjects, including the microstrip antenna and the dipole and printed monopole antenna. The varieties of antenna designs, along with several different approaches to improve their overall performance, have given this book a great value, in which makes this book is deemed as a good reference for practicing engineers and under/postgraduate students working in this field. The key technology trends in antenna design as part of the mobile communication evolution have mainly focused on multiband, wideband, and MIMO antennas, and all have been clearly presented, studied and implemented within this book. The forthcoming 5G systems consider a truly mobile multimedia platform that constitutes a converged networking arena that not only includes legacy heterogeneous mobile networks but advanced radio interfaces and the possibility to operate at mm wave frequencies to capitalize on the large swathes of available bandwidth. This provides the impetus for a new breed of antenna design that, in principle, should be multimode in nature, energy efficient, and, above all, able to operate at the mm wave band, placing new design drivers on the antenna design. Thus, this book proposes to investigate advanced 5G antennas for heterogeneous applications that can operate in the range of 5G spectrums and to meet the essential requirements of 5G systems such as low latency, large bandwidth, and high gains and efficiencies

Microwave and Millimeter-wave Miniaturization Techniques, and Their Applications

Miniaturization is an inevitable requirement for modern microwave and mm-wave circuits and systems. With the emerging of high frequency monolithic integrated circuits, it is the passive components’ section that usually occupies the most of the area. As a result, developing creative miniaturization techniques in order to reduce the physical sizes of passive components while keep their high performance characteristics is demanding. On the other hand, it is the application that defines the importance and effectiveness of the miniaturization method. For example, in commercial handset wireless communication systems, it is the portability that primarily dictates miniaturization. However, in case of liquid sensing applications, the required volume of the sample, cost, or other parameters might impose size limitations. In this thesis, various microwave and mm-wave miniaturization methods are introduced. The methods are applied to various passive components and blocks in different applications to better study their effectiveness. Both componentlevel designs and system-level hybrid integration are benefited from the miniaturization methods introduced in this thesis. The proposed methods are also experimentally tested, and the results show promising potential for the proposed methods

Microwave and Millimeter-wave Miniaturization Techniques, and Their Applications

Miniaturization is an inevitable requirement for modern microwave and mm-wave circuits and systems. With the emerging of high frequency monolithic integrated circuits, it is the passive components’ section that usually occupies the most of the area. As a result, developing creative miniaturization techniques in order to reduce the physical sizes of passive components while keep their high performance characteristics is demanding. On the other hand, it is the application that defines the importance and effectiveness of the miniaturization method. For example, in commercial handset wireless communication systems, it is the portability that primarily dictates miniaturization. However, in case of liquid sensing applications, the required volume of the sample, cost, or other parameters might impose size limitations. In this thesis, various microwave and mm-wave miniaturization methods are introduced. The methods are applied to various passive components and blocks in different applications to better study their effectiveness. Both componentlevel designs and system-level hybrid integration are benefited from the miniaturization methods introduced in this thesis. The proposed methods are also experimentally tested, and the results show promising potential for the proposed methods

Power-Efficient and High-Performance Cicruit Techniques for On-Chip Voltage Regulation and Low-Voltage Filtering

This dissertation focuses on two projects. The first one is a power supply rejection (PSR) enhanced with fast settling time (TS) bulk-driven feedforward (BDFF) capacitor-less (CL) low-dropout (LDO) regulator. The second project is a high bandwidth (BW) power adjustable low-voltage (LV) active-RC 4th -order Butterworth low pass filter (LPF). As technology improves, faster and more accurate LDOs with high PSR are going to be required for future on-chip applications and systems.The proposed BDFF CL-LDO will accomplish an improved PSR without degrading TS. This would be achieved by injecting supply noise through the pass device’s bulk terminal in order to cancel the supply noise at the output. The supply injection will be achieved by creating a feedforward path, which compared to feedback paths, that doesn’t degrade stability and therefore allows for faster dynamic performance. A high gain control loop would be used to maintain a high accuracy and dc performance, such as line/load regulation. The proposed CL-LDO will target a PSR better than – 90 dB at low frequencies and – 60 dB at 1 MHz for 50 mA of load current (IvL). The CL-LDO will target a loop gain higher than 90 dB, leading to an improved line and load regulation, and unity-gain frequency (UGF) higher than 20 MHz, which will allow a TS faster than 500 ns. The CL-LDO is going to be fabricated in a CMOS 130 nm technology; consume a quiescent current (IQ) of less than 50 μA; for a dropout voltage of 200 mV and an IvL of 50 mA. As technology scales down, speed and performance requirements increase for on-chip communication systems that reflect the current demand for high speed data-oriented applications. However, in small technologies, it becomes harder to achieve high gain and high speed at the same time because the supply voltage (VvDvD) decreases leaving no room for conventional high gain CMOS structures. The proposed active-RC LPF will accomplish a LV high BW operation that would allow such disadvantages to be overcome. The LPF will be implemented using an active RC structure that allows for the high linearity such communication systems demand. In addition, built-in BW and power configurability would address the demands for increased flexibility usually required in such systems. The proposed LV LPF will target a configurable cut-off frequency (ƒо) of 20/40/80/160 MHz with tuning capabilities and power adjustability for each ƒо. The filter will be fabricated in a CMOS 130 nm technology. The filter characteristics are as following: 4th -order, active-RC, LPF, Butterworth response, VDD = 0.6 V, THD higher than 40 dB and a third-order input intercept point (IIP3) higher than 10 dBm

Active Backscattering Positioning System Using Innovative Harmonic Oscillator Tags for Future Internet of Things: Theory and Experiments

RÉSUMÉ D'ici 2020, l'Internet des objets (IoT) permettra probablement de créer 25 milliards d'objets connectés, 44 ZB de données et de débloquer 11 000 milliards de dollars d’opportunités commerciales. Par conséquent, ce sujet a suscité d’énormes intérêts de recherche dans le monde académique entier. L'une des technologies clés pour l'IoT concerne le positionnement physique intérieur précis. Le principal objectif dans ce domaine est le développement d'un système de positionnement intérieur avec une grande précision, une haute résolution, un fonctionnement à plusieurs cibles, un faible coût, un faible encombrement et une faible consommation d'énergie. Le système de positionnement intérieur conventionnel basé sur les technologies de Wi-Fi ou d'identification par radiofréquence (RFID) ne peut répondre à ces exigences. Principalement parce que leur appareil et leur signal ne sont pas conçus spécialement pour atteindre les objectifs visés. Les chercheurs ont découvert qu'en mettant en oeuvre de différents types de modulation sur les étiquettes, le radar à onde continue (CW) et ses dérivés deviennent des solutions prometteuses. Les activités de recherche présentées dans cette thèse sont menées dans le but de développer des systèmes de positionnement en intérieur bidimensionnel (2-D) à plusieurs cibles basées sur des étiquettes actives à rétrodiffusion harmonique avec une technique à onde continue modulée en fréquence (FMCW). Les contributions de cette thèse peuvent être résumées comme suit: Tout d'abord, la conception d'un circuit actif harmonique, plus spécifiquement une classe d'oscillateurs harmoniques innovants utilisée comme composant central des étiquettes actives dans notre système, implique une méthodologie de conception de signal de grande taille et des installations de caractérisation. L’analyseur de réseau à grand signal (LSNA) est un instrument émergent basé sur les fondements théoriques du cadre de distorsion polyharmonique (PHD). Bien qu'ils soient disponibles dans le commerce depuis 2008, des organismes de normalisation et de recherche tels que l’Institut national des normes et de la technologie (NIST) des États-Unis travaillent toujours à la mise au point d'un standard largement reconnu permettant d'évaluer et de comparer leurs performances. Dans ce travail, un artefact de génération multi-harmonique pour la vérification LSNA est développé. C'est un dispositif actif capable de générer les 5 premières harmoniques d'un signal d'entrée avec une réponse ultra-stables en amplitude et en phase, quelle que soit la variation de l'impédance de la charge.----------ABSTRACT By 2020, the internet of things (IoT) will probably enable 25 billion connected objects, create 44 ZB data and unlock 11 trillion US dollar business opportunities. Therefore, this topic has been attracting tremendous research interests in the entire academic world. One of the key enabling technologies for IoT is concerned with accurate indoor physical positioning. The development of such an indoor positioning system with high accuracy, high resolution, multitarget operation, low cost, small footprint, and low power consumption is the major objective in this area. The conventional indoor positioning system based on WiFi or radiofrequency identification (RFID) technology cannot fulfill these requirements mainly because their device and signal are not purposely designed for achieving the targeted goals. Researchers have found that by implementing different types of modulation on the tags, continuous-wave (CW) radar and its derivatives become promising solutions. The research activities presented in this Ph.D. thesis are carried out towards the goal of developing multitarget two-dimensional (2-D) indoor positioning systems based on harmonic backscattering active tags together with a frequency-modulated continuous-wave (FMCW) technique. Research contributions of this thesis can be summarized as follows: First of all, the design of a harmonic active circuit, more specifically, a class of innovative harmonic oscillators used as the core component of active tags in our system, involves a large signal design methodology and characterization facilities. The large signal network analyzer (LSNA) is an emerging instrument based on the theoretical foundation for the Poly-Harmonic Distortion (PHD) framework. Although they have been commercially available since 2008, standard and research organizations such as the National Institute of Standards and Technology (NIST) of the US are still working towards a widely-recognized standard to evaluate and cross-reference their performances. In this work, a multi-harmonic generation artifact for LSNA verification is developed. It is an active device that can generate the first 5 harmonics of an input signal with ultra-stable amplitude and phase response regardless of the load impedance variation

Accurate characterisation of Resonant Tunnelling Diodes for high-frequency applications

Recent scientific advancements regarding the generation and detection of terahertz (THz) radiation have led to a rapid increase in research interest in this frequency band in the context of its numerous potential applications including high-speed wireless communications, biomedical diagnostics, security screening and material science. Various proposed solutions have been investigated in the effort to bridge this relatively unexplored region of the electromagnetic spectrum, and thus exploit its untapped potential. Among them, the resonant tunnelling diode (RTD) has been demonstrated as the fastest electronic device with its room temperature operation extending into the THz range. The RTD exhibits a negative differential resistance (NDR) region in its I-V characteristics, with this feature being key to its capabilities. Even though the unique capabilities of RTD devices have been experimentally proven in the realisation of compact NDR oscillators and detectors, with fundamental frequencies of about 2 THz, and high-sensitivity detectors up to 0.83 THz, the reliable design procedures and methodologies of RTD-based circuits are yet to be fully developed. In this regard, significant effort has been devoted primarily to the accurate theoretical description of the high-frequency behaviour of RTDs, using various small-signal equivalent circuit models. However, many of these models have had either limited or no experimental validation, and so a robust and reliable RTD device model is desirable. The aim of this thesis is to describe a systematic approach regarding the design, fabrication and characterisation of RTD devices, providing a universal methodology to accurately determine their radio-frequency (RF) behaviour, and so this way enable a consistent integrated circuit design procedure for high-frequency circuits. A significant challenge in the modelling of RTD devices is represented by the presence of parasitic bias oscillations within the NDR region. This has been identified as one of the main restricting factors with regards to the accurate high-frequency characterisation of this operating region. The common approach to overcoming this limitation is through a stabilising technique comprising of an external shunt-resistor network. This approach has been successfully demonstrated to suppress bias oscillations in RTD-based circuits which require operation within the NDR region. However, the introduction of the additional circuit component associated with this method increases the complexity of the de-embedding procedure of the extrinsic parasitic elements, rendering the overall device characterisation generally difficult at high-frequencies. In this work, a novel on-wafer bond-pad and shunt resistor network de-embedding technique was developed in order to facilitate the characterisation of RTDs throughout the complete bias range, without limitation to device sizing or frequency, under a stable operating regime. The procedure was demonstrated to accurately determine the circuit high-frequency behaviour of the RTD device from S-parameter measurements up to 110 GHz. The universal nature of this procedure allows it to be easily adapted to accommodate higher complexity stabilising networks configuration or different bond-pad geometries. Furthermore, the de-embedding method has also enabled the development of a novel quasi-analytical procedure for high accuracy extraction of the device equivalent circuit parameters, which is expected to provide a strong experimental foundation for the further establishment of a universal RTD RF model. The applicability of the developed high-frequency model, which can be easily scaled for various device sizes, together with the measured RTD I-V characteristics was further demonstrated in the development of a non-linear model, which was integrated in a commercial simulator, the Advanced Design Systems (ADS) software from Keysight Technologies. From an application perspective, the model was used in the design of an RTD as a square-law detector for high-frequency data transmission systems. The simulated detector performance was validated experimentally using an RTD-based transmitter in the W-band (75 – 110 GHz) up to 4 Gbps (error free transmission: BER < 10-10 in a waveguide connection), and in the Ka-band (26.5 – 50 GHz) up to 2.4 Gbps (error free transmission in a wireless data link), which demonstrated the accuracy of the developed RTD modelling approach. Lastly, a sensitivity analysis of the RTD-based detector within the Ka-band showed a superior RTD performance over commercially available solutions, with a peak (corrected) detector responsivity of 13.48 kV/W, which is a factor of >6 better compared to commercially available Schottky barrier diode (SBD) detectors

Intelligent Circuits and Systems

ICICS-2020 is the third conference initiated by the School of Electronics and Electrical Engineering at Lovely Professional University that explored recent innovations of researchers working for the development of smart and green technologies in the fields of Energy, Electronics, Communications, Computers, and Control. ICICS provides innovators to identify new opportunities for the social and economic benefits of society.　 This conference bridges the gap between academics and R&D institutions, social visionaries, and experts from all strata of society to present their ongoing research activities and foster research relations between them. It provides opportunities for the exchange of new ideas, applications, and experiences in the field of smart technologies and finding global partners for future collaboration. The ICICS-2020 was conducted in two broad categories, Intelligent Circuits & Intelligent Systems and Emerging Technologies in Electrical Engineering

1-D broadside-radiating leaky-wave antenna based on a numerically synthesized impedance surface

A newly-developed deterministic numerical technique for the automated design of metasurface antennas is applied here for the first time to the design of a 1-D printed Leaky-Wave Antenna (LWA) for broadside radiation. The surface impedance synthesis process does not require any a priori knowledge on the impedance pattern, and starts from a mask constraint on the desired far-field and practical bounds on the unit cell impedance values. The designed reactance surface for broadside radiation exhibits a non conventional patterning; this highlights the merit of using an automated design process for a design well known to be challenging for analytical methods. The antenna is physically implemented with an array of metal strips with varying gap widths and simulation results show very good agreement with the predicted performance