1 research outputs found
Deterministic Computations on a PRAM with Static Processor and Memory Faults.
We consider Parallel Random Access Machine (PRAM) which has some processors
and memory cells faulty. The faults considered are static, i.e., once the
machine starts to operate, the operational/faulty status of PRAM components
does not change. We develop a deterministic simulation of a fully operational
PRAM on a similar faulty machine which has constant fractions of faults among
processors and memory cells. The simulating PRAM has processors and
memory cells, and simulates a PRAM with processors and a constant fraction
of memory cells. The simulation is in two phases: it starts with
preprocessing, which is followed by the simulation proper performed in a
step-by-step fashion. Preprocessing is performed in time . The slowdown of a step-by-step part of the simulation is