2 research outputs found

    DESIGN OF FLOATING POINT PI CURRENT CONTROLLER FOR SPEED CONTROL OF IPMSM USING FPGA

    Get PDF
    The PI Controller can be considered as the essential part for efficient Speed Control of the Interior Permanent Magnet Synchronous Motor. In digital control, two platforms exist to implement this controller, namely DSP and FPGA. The FPGA is more preferred than the DSP due to the concurrent facility. To obtain the full facilities of the digital control and for high accuracy speed control of motors, floating point PI Controller should be used instead of the fixed point. The problem of the FPGA is that it is programmed using VHDL or Verilog which deals only with fixed-point representation. This paper shows a full design of floating-point PI Controller using Altera DE2i-150 platform and Altera Megafunctions. The results are proven using two simulation platforms ModelSim-Altera Starter Edition 15.0 and Matlab Simulink

    A single chip FPGA-based solution for controlling of multi-unit PMSM motor with time-division multiplexing scheme

    No full text
    All rights reserved. The use of multiple unit controllers for parallel processing of multi-unit motor drive systems can significantly reduce the execution time of the control algorithm. However, this approach does not only increase the system cost but also incurs in additional cost of hardware and software interconnections. This paper presents a fully integrated single chip field programmable gate array (FPGA) based solution for controlling of an independent multi-unit permanent magnet synchronous motor (PMSM) drive system with space vector pulse width modulation (SVPWM) based vector control. For multi-unit motor systems, the complexity of control algorithms often exceeds the resource availability of low-cost FPGA devices. Thus, a system-level time-division multiplexing scheme applicable for multi-motor control systems is proposed. Using the proposed method, large identical complex control algorithms can be simplified into a single compact algorithm, which is fitted and configured into a low-cost FPGA. Simulation modeling and experimental results are shown, confirming the effectiveness of a multi-unit PMSM motor drive system using an inexpensive controller based on system-level time-division multiplexing scheme, which can operate simultaneously with robustness under different operating conditions.info:eu-repo/semantics/publishedVersio
    corecore