Mobility degradation and series resistance in graphene field-effect transistors

Accurate device models and parameter extraction methods are of utmost importance for characterizing graphene field-effect transistors (GFETs) and for predicting their performance in circuit applications. For DC characterization, accurate extraction of mobility and series resistance is of particular concern. In this paper, we show how a first-order mobility degradation model can be used to separate information about mobility degradation and series resistance for a set of GFETs of different channel lengths. Data from a large set of top-gated GFETs based on chemical vapor deposited (CVD) graphene was analyzed to validate the proposed model and extraction procedures. For removing any uncertainties caused by observed device-to-device data variations due to the uneven quality of CVD graphene, the same methods were applied to a set of closely located bottom-gated GFETs found in literature. Those GFETs were designed for transfer length methods and fabricated on exfoliated graphene of homogenous quality. Similar mobility degradation behavior was observed for both sets of devices with the mobility being reduced to half for a voltage-induced charge carrier density of 1013 cm-2

Parameter extraction techniques for the analysis and modeling of resistive memories

A revision of the different numerical techniques employed to extract resistive switching (RS) and modeling parameters is presented. The set and reset voltages, commonly used for variability estimation, are calculated for different resistive memory technologies. The methodologies to extract the series resistance and the parameters linked to the charge-flux memristive modeling approach are also described. It is found that the obtained cycle-to-cycle (C2C) variability depends on the numerical technique used. This result is important, and it implies that when analyzing C2C variability, the extraction technique should be described to perform fair comparisons between different resistive memory technologies. In addition to the use of extensive experimental data for different types of resistive memories, we have also included kinetic Monte Carlo (kMC) simulations to study the formation and rupture events of the percolation paths that constitute the conductive filaments (CF) that allow resistive switching operation in filamentary unipolar and bipolar devices.Consejería de Conocimiento, Investigaci ́on y Universidad, Junta de Andalucía (Spain) and the FEDER program for the projects A.TIC.117.UGR18, B-TIC-624-UGR20 and IE2017-5414Ramón y Cajal grant No. RYC2020-030150-IFunding for open access charge: Universidad de Granada/CBU

A Review Of Dc Extraction Methods For Mosfet Series Resistance And Mobility Degradation Model Parameters

The performance of modern MOSFETs is limited by the presence of parasitic series resistances and mobility degradation. This article reviews and assesses 18 of the extraction methods currently used to determine the values of parasitic series resistances and mobility degradation from the measured drain current. The methods are separated in 3 groups: seven different methods that use the transfer characteristics of several devices having different mask channel lengths; five methods based on a single device with different drain and gate bias; six methods which account for the asymmetry between drain and source resistance